CS Store Search
Displaying 1-4 out of 4 total
Composite Cores: Pushing Heterogeneity Into a Core
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
By Andrew Lukefahr,Shruti Padmanabha,Reetuparna Das,Faissal M. Sleiman,Ronald Dreslinski,Thomas F. Wenisch,Scott Mahlke
Issue Date:December 2012
Heterogeneous multicore systems -- comprised of multiple cores with varying capabilities, performance, and energy characteristics -- have emerged as a promising approach to increasing energy efficiency. Such systems reduce energy consumption by identifying...
WiBench: An open source kernel suite for benchmarking wireless systems
2013 IEEE International Symposium on Workload Characterization (IISWC)
By Qi Zheng,Yajing Chen,Ronald Dreslinski,Chaitali Chakrabarti,Achilleas Anastasopoulos,Scott Mahlke,Trevor Mudge
Issue Date:September 2013
The rapid growth in the number of mobile devices and the higher data rate requirements of mobile subscribers have made wireless signal processing a key driving application of mobile computing technology. To design better mobile platforms and the supporting...
Exploring DRAM organizations for energy-efficient and resilient exascale memories
Found in: Proceedings of SC13: International Conference for High Performance Computing, Networking, Storage and Analysis (SC '13)
By Bharan Giridhar, Chaitali Chakrabarti, David Blaauw, Deepankar Duggal, Hsing Min Chen, Michael Cieslak, Betina Hold, Robert Patti, Ronald Dreslinski, Trevor Mudge
Issue Date:November 2013
The power target for exascale supercomputing is 20MW, with about 30% budgeted for the memory subsystem. Commodity DRAMs will not satisfy this requirement. Additionally, the large number of memory chips (>10M) required will result in crippling failure ra...
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
Found in: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems (ASPLOS-XII)
By Ali Saidi, Krisztian Flautner, Nathan Binkert, Ronald Dreslinski, Shaun D'Souza, Steven Reinhardt, Taeho Kgil, Trevor Mudge
Issue Date:October 2006
In this paper, we show how 3D stacking technology can be used to implement a simple, low-power, high-performance chip multiprocessor suitable for throughput processing. Our proposed architecture, PicoServer, employs 3D technology to bond one die containing...
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