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Revisiting Using the Results of Pre-Executed Instructions in Runahead Processors
Found in: IEEE Computer Architecture Letters
By Sonya Wolff,Ronald Barnes
Issue Date:September 2013
pp. 1
Long-latency cache accesses cause significant performance-impacting delays for both in-order and out-of-order processor systems. To address these delays, runahead pre-execution has been shown to produce speedups by warming-up cache structures during stalls...
 
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