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Displaying 1-10 out of 10 total
Scalable Softcore Vector Processor for Biosequence Applications
Found in: Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
By Arpith C. Jacob, Brandon Harris, Jeremy Buhler, Roger Chamberlain, Young H. Cho
Issue Date:April 2006
pp. 295-296
<p>Currently available genome databases are growing exponentially in size1, making it difficult for software analysis tools to keep up. A number of hardware accelerators utilizing special purpose VLSI [1] or reconfigurable hardware [2] have been prop...
 
Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory
Found in: Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on
By Roger Chamberlain, John Lockwood, Saurabh Gayen, Richard Hough, Phillip Jones
Issue Date:June 2005
pp. 97-98
This paper describes our experience to date and current plans for a senior-level microelectronics laboratory course on hardware/software codesign. The course utilizes an open-source, soft-core processor deployed on the FPX platform as an integral component...
   
Biosequence Similarity Search on the Mercury System
Found in: Application-Specific Systems, Architectures and Processors, IEEE International Conference on
By Praveen Krishnamurthy, Jeremy Buhler, Roger Chamberlain, Mark Franklin, Kwame Gyang, Joseph Lancaster
Issue Date:September 2004
pp. 365-375
Biosequence similarity search is an important application in modern molecular biology. Search algorithms aim to identify sets of sequences whose extensional similarity suggests a common evolutionary origin or function. The most widely used similarity searc...
 
Dynamic Reconfiguration of an Optical Interconnect
Found in: Simulation Symposium, Annual
By Praveen Krishnamurthy, Mark Franklin, Roger Chamberlain
Issue Date:April 2003
pp. 89
The advent of optical technology that can feasibly support extremely high bandwidth chip-to-chip communication raises a host of architectural questions in the design of digital systems. Terabit per second (and higher) bandwidths have not previously been av...
 
Modeling the Power Consumption of Audio Signal Processing Computations Using Customized Numerical Representations
Found in: Simulation Symposium, Annual
By Roger Chamberlain, Eric Hemmeter, Robert Morley, Jason White
Issue Date:April 2003
pp. 249
This paper explores the impact that numerical representation has on the power consumption of audio signal processing applications. The motivation is digital hearing aids, for which minimizing the power consumption is a critical design goal. We investigate ...
 
Tradeoffs Between Quality of Results and Resource Consumption in a Recognition System
Found in: Application-Specific Systems, Architectures and Processors, IEEE International Conference on
By Michael DeVore, Roger Chamberlain, George Engel, Joseph O'Sullivan, Mark Franklin
Issue Date:July 2002
pp. 391
The implementation of computational systems to perform challenging operations often involves balancing the performance specification, system throughput, and available system resources. For problems of automatic target recognition (ATR), these three quantit...
 
Optical Network Reconfiguration for Signal Processing Applications
Found in: Application-Specific Systems, Architectures and Processors, IEEE International Conference on
By Roger Chamberlain, Mark Franklin, Praveen Krishnamurthy
Issue Date:July 2002
pp. 344
This paper considers a class of embedded signal processing applications.To achieve real-time performance these applications must be executed on a parallel processor.The paper focuses on the multiring optical interconnection network used in the system and s...
 
An Architecture for Fast Processing of Large Unstructured Data Sets
Found in: Computer Design, International Conference on
By Mark Franklin, Roger Chamberlain, Michael Henrichs, Berkley Shands, Jason White
Issue Date:October 2004
pp. 280-287
This paper presents a general system architecture tailored to performing searching, filtering, compression, encryption, and other operations on unstructured data streaming from a disk system. The system achieves high performance on such applications by pro...
 
Evaluating the Performance of Photonic Interconnection Networks
Found in: Simulation Symposium, Annual
By Roger Chamberlain, Ch'ng Shi Baw, Mark Franklin, Christopher Hackmann, Praveen Krishnamurthy, Abhijit Mahajan, Michael Wrighton
Issue Date:April 2002
pp. 0209
This paper describes the design and use of the Interconnection Network Simulator (ICNS) framework. ICNS is a modular, object-oriented simulation system that has been developed to investigate performance issues in multiprocessor interconnection networks tha...
 
The pessimism behind optimistic simulation
Found in: Proceedings of the eighth workshop on Parallel and distributed simulation (PADS '94)
By George Varghese, Roger Chamberlain, William E. Weihl
Issue Date:July 1994
pp. 1-ff
In this paper we make an analogy between the time that storage must be maintained in an optimistic simulation and the blocking time in a conservative simulation. By exploring this analogy, we design two new Global Virtual Time (GVT) protocols for Time Warp...
     
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