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Displaying 1-19 out of 19 total
Job Recruitment and Job Seeking Processes: How Technology Can Help
Found in: IT Professional
By Paolo Montuschi,Valentina Gatteschi,Fabrizio Lamberti,Andrea Sanna,Claudio Demartini
Issue Date:September 2014
pp. 41-49
This survey of current job search and recruitment tools focuses on applying a computer-based approach to job matchmaking. The authors present a semantic-based software platform, LO-MATCH--developed in the framework of a European project on lifelong learnin...
 
Augmented Reading: The Present and Future of Electronic Scientific Publications
Found in: Computer
By Paolo Montuschi,Alfredo Benso
Issue Date:January 2014
pp. 64-74
As technological, economic, and social factors drive scientific publishing toward electronic formats, opportunities open beyond traditional reading and writing frameworks. Journal articles now, and in the future, can increasingly include a variety of suppl...
 
A General Approach for Improving RNS Montgomery Exponentiation Using Pre-processing
Found in: Computer Arithmetic, IEEE Symposium on
By Filippo Gandino, Fabrizio Lamberti, Paolo Montuschi, Jean-Claude Bajard
Issue Date:July 2011
pp. 195-204
The hardware implementation of modular exponentiation for very large integers is a well-known topic in digital arithmetic. An effective approach for obtaining parallel and carry-free implementations consists in using the Montgomery exponentiation algorithm...
 
Reducing the Computation Time in (Short Bit-Width) Two's Complement Multipliers
Found in: IEEE Transactions on Computers
By Fabrizio Lamberti, Nikos Andrikos, Elisardo Antelo, Paolo Montuschi
Issue Date:February 2011
pp. 148-156
Two's complement multipliers are important for a wide range of applications. In this paper, we present a technique to reduce by one row the maximum height of the partial product array generated by a radix-4 Modified Booth Encoded multiplier, without any in...
 
Improved Design of High-Performance Parallel Decimal Multipliers
Found in: IEEE Transactions on Computers
By Alvaro Vazquez, Elisardo Antelo, Paolo Montuschi
Issue Date:May 2010
pp. 679-693
The new generation of high-performance decimal floating-point units (DFUs) is demanding efficient implementations of parallel decimal multipliers. In this paper, we describe the architectures of two parallel decimal multipliers. The parallel generation of ...
 
Guest Editors' Introduction: Special Section on Computer Arithmetic
Found in: IEEE Transactions on Computers
By Peter Kornerup, Paolo Montuschi, Jean-Michel Muller, Eric Schwarz
Issue Date:February 2009
pp. 145-147
No summary available.
 
A Radix-2 Digit-by-Digit Architecture for Cube Root
Found in: IEEE Transactions on Computers
By Alex Piñeiro, Javier D. Bruguera, Fabrizio Lamberti, Paolo Montuschi
Issue Date:April 2008
pp. 562-566
A radix-2 digit-recurrence algorithm and architecture for the computation of the cube root are presented in this paper. The original recurrence based on the concept of completing the cube is modified to allow an efficient implementation of the algorithm, a...
 
A Digit-by-Digit Algorithm for mth Root Extraction
Found in: IEEE Transactions on Computers
By Paolo Montuschi, Javier D. Bruguera, Luigi Ciminiera, José-Alejandro Piñeiro
Issue Date:December 2007
pp. 1696-1706
A general digit-recurrence algorithm for the computation of the m-th root (with <em>m</em> integer) is presented in this paper. Based on the concept of completing the <em>m</em>-th root, a detailed analysis of the convergence condit...
 
A New Family of High.Performance Parallel Decimal Multipliers
Found in: Computer Arithmetic, IEEE Symposium on
By Alvaro Vazquez, Elisardo Antelo, Paolo Montuschi
Issue Date:June 2007
pp. 195-204
This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry-save multioperand addition that uses a novel BCD-4221 recoding for decimal digits. It significantly improves the ...
 
Digit-Recurrence Dividers with Reduced Logical Depth
Found in: IEEE Transactions on Computers
By Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
Issue Date:July 2005
pp. 837-851
In this paper, we propose a class of division algorithms with the aim of reducing the delay of the selection of the quotient digit by introducing more concurrency and flexibility in its computation. From the proposed class of algorithms, we select one that...
 
Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture
Found in: Computer Arithmetic, IEEE Symposium on
By Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
Issue Date:June 2005
pp. 147-154
The reciprocol and square-root reciprocol operations are important in several applications. For these operations, we present algorithms that combine a digit-by-digit module and one iteration of a quadratic-convergence approximation. The latter is implement...
 
Boosting Very-High Radix Division with Prescaling and Selection by Rounding
Found in: IEEE Transactions on Computers
By Paolo Montuschi, Tomás Lang
Issue Date:January 2001
pp. 13-27
<p><b>Abstract</b>—An extension of the very-high radix division with prescaling and selection by rounding is presented. This extension consists of increasing the effective radix of the implementation by obtaining a few additional bits of ...
 
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit
Found in: IEEE Transactions on Computers
By Tomás Lang, Paolo Montuschi
Issue Date:August 1999
pp. 827-841
<p><b>Abstract</b>—An algorithm for square root with prescaling and selection by rounding is developed and combined with a similar scheme for division. Since division is usually more frequent than square root, the main concern of the comb...
 
Boosting Very-High Radix Division with Prescaling and Selection by Rounding
Found in: Computer Arithmetic, IEEE Symposium on
By Paolo Montuschi, Tomas Lang
Issue Date:April 1999
pp. 52
An extension of the very-high radix division with prescaling and selection by rounding is presented. This extension consists in increasing the effective radix of the implementation by obtaining a few additional bits of the quotient per iteration, without i...
 
A Q-Coder Algorithm with Carry Free Addition
Found in: Computer Arithmetic, IEEE Symposium on
By Gianluca Cena, Paolo Montuschi, Luigi Ciminiera, Andrea Sanna
Issue Date:March 1997
pp. 282
The Q-Coder algorithm is a very efficient compression technique for bi-level images based on the arithmetic coding. This paper presents a new and fast version of the Q-Coder algorithm in which the carry-propagated adders have been replaced by carry-save ad...
 
Carry-Save Multiplication Schemes Without Final Addition
Found in: IEEE Transactions on Computers
By Luigi Ciminiera, Paolo Montuschi
Issue Date:September 1996
pp. 1050-1055
<p><b>Abstract</b>—Carry-save multipliers require an adder at the last step to convert the carry-sum representation of the most significant half of the result into a non-redundant form. This paper presents <it>n</it>×<it>...
 
A Remark on 'Reducing Iteration Time when Result Digit is Zero for Radix-2 SRT Division and Square Root with Redundant Remainders'
Found in: IEEE Transactions on Computers
By Paolo Montuschi, Luigi Ciminiera
Issue Date:January 1995
pp. 144-146
<p><it>Abstract—</it>In a previous paper by P. Montuschi and L. Ciminiera, an architecture for shared radix 2 division and square root, has been presented whose main characteristic is the ability to avoid any addition/subtraction, when th...
 
Design and Analysis of Approximate Compressors for Multiplication
Found in: IEEE Transactions on Computers
By Amir Momeni,Jie Han,Paolo Montuschi,Fabrizio Lombardi
Issue Date:February 2014
pp. 1
Inexact (or approximate) computing is an attractive paradigm for digital processing at nanometric scales. Inexact computing is particularly interesting for computer arithmetic designs. This paper deals with the analysis and design of two new approximate 4-...
 
Fast Radix-4 Retimed Division with Selection by Comparisons
Found in: Application-Specific Systems, Architectures and Processors, IEEE International Conference on
By Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
Issue Date:July 2002
pp. 185
Since a large portion of the critical path in an implementation of radix-4 division corresponds to the delay of the quotient-digit selection module, it is of interest to reduce this delay. The proposal of this paper extends the approach presented recently ...
 
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