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Displaying 1-8 out of 8 total
An Analytical Performance Evaluation for WSNs Using Loop-Free Bellman Ford Protocol
Found in: Advanced Information Networking and Applications, International Conference on
By Mohammad Baharloo, Reza Hajisheykhi, Mohammad Arjomand, Amir Hossein Jahangir
Issue Date:May 2009
pp. 568-571
Although several analytical models have been proposed for wireless sensor networks (WSNs) with different capabilities, very few of them consider the effect of general service distribution as well as design constraints on network performance. This paper pre...
A Reliable 3D MLC PCM Architecture with Resistance Drift Predictor
Found in: 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
By Majid Jalili,Mohammad Arjomand,Hamid Sarbazi Azad
Issue Date:June 2014
pp. 204-215
In this paper, we study the problem of resistance drift in an MLC Phase Change Memory (PCM) and propose a solution to circumvent its thermally-affected accelerated rate in 3D CMPs. Our scheme is based on the observation that instead of alleviating the prob...
An Opto-electrical NoC with Traffic Flow Prediction in Chip Multiprocessors
Found in: 2014 22nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)
By Millad Ghane,Mohammad Arjomand,Hamid Sarbazi-azad
Issue Date:February 2014
pp. 440-443
Network-on-Chip (NoC) paradigm has emerged as a revolutionary methodology to integrate numerous IP blocks on a single chip. The achievable performance of adopting NoCs is constrained by the performance limitation mainly imposed by the metal wires that are ...
Application-aware deadlock-free oblivious routing based on extended turn-model
Found in: Computer-Aided Design, International Conference on
By Ali Shafiee,Mahdy Zolghadr,Mohammad Arjomand,Hamid Sarbazi-azad
Issue Date:November 2011
pp. 213-218
Programmable hardware is gaining popularity as it can keep pace with growing performance demand in tight power budget, design and test cost, and serious reliability concerns of future multiprocessor embedded systems. Compatible with this trend, Network-on-...
A morphable phase change memory architecture considering frequent zero values
Found in: Computer Design, International Conference on
By Mohammad Arjomand,Amin Jadidi,Ali Shafiee,Hamid Sarbazi-Azad
Issue Date:October 2011
pp. 373-380
Phase Change Memory (PCM) is emerging as a high-dense and power-efficient choice for future main memory systems. While PCM cell size is marching towards minimum achievable feature size, recent prototypes effectively improve device scalability by storing mu...
Voltage-Frequency Planning for Thermal-Aware, Low-Power Design of Regular 3-D NoCs
Found in: VLSI Design, International Conference on
By Mohammad Arjomand, Hamid Sarbazi-Azad
Issue Date:January 2010
pp. 57-62
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. For power reduction, multiple voltage-frequency levels are successfully appli...
Reducing access latency of MLC PCMs through line striping
Found in: 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)
By Morteza Hoseinzadeh,Mohammad Arjomand,Hamid Sarbazi-Azad
Issue Date:June 2014
pp. 277-288
Although phase change memory with multi-bit storage capability (known as MLC PCM) offers a good combination of high bit-density and non-volatility, its performance is severely impacted by the increased read/write latency. Regarding read operation, access l...
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Found in: Proceedings of the 23rd international conference on Supercomputing (ICS '09)
By Hamid Sarbazi-Azad, Mohammad Arjomand
Issue Date:June 2009
pp. 1-1
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a crucial element affecting the overall system performance. On the other hand, tech...