Search For:

Displaying 1-24 out of 24 total
Guest Editors' Introduction
Found in: IEEE Transactions on Computers
By Fabrizio Lombardi, Mariagiovanna Sami
Issue Date:June 2000
pp. 529-531
No summary available.
 
Fault-Tolerant Network Interfaces for Networks-on-Chip
Found in: IEEE Transactions on Dependable and Secure Computing
By Leandro Fiorin,Mariagiovanna Sami
Issue Date:January 2014
pp. 16-29
As the complexity of designs increases and technology scales down into the deep-submicron domain, the probability of malfunctions and failures in the networks-on-chip (NoCs) components increases. In this work, we focus on the study and evaluation of techni...
 
Analyzing the Sensitivity to Faults of Synchronization Primitives
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Paolo Roberto Grassi,Mariagiovanna Sami,Ettore Speziale,Michele Tartara
Issue Date:October 2011
pp. 349-355
Modern multi-core processors provide primitives to allow parallel programs to atomically perform selected operations. Unfortunately, the increasing number of gates in such processors leads to a higher probability of faults happening during the computation....
 
Design of Fault Tolerant Network Interfaces for NoCs
Found in: Digital Systems Design, Euromicro Symposium on
By Leandro Fiorin,Laura Micconi,Mariagiovanna Sami
Issue Date:September 2011
pp. 393-400
Networks-on-Chip (NoCs) appeared as a strategy to deal with the communication requirements of complex IP-based System-on-Chips. As the complexity of designs increases and the technology scales down into the deep-submicron domain, the probability of malfunc...
 
Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations
Found in: Digital Systems Design, Euromicro Symposium on
By Leandro Fiorin, Cristina Silvano, Mariagiovanna Sami
Issue Date:August 2007
pp. 539-542
Security has gained increasing relevance in the develop- ment of embedded devices. Towards the aim of a secure sys- tem at each level of the design, in this paper we address se- curity aspects related to Networks-on-Chips (NoCs) archi- tectures. After pres...
 
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor
Found in: Computer Architectures for Machine Perception, International Workshop on
By Domenico Barretta, Gianluca Palermo, Mariagiovanna Sami, Roberto Zafalon
Issue Date:July 2005
pp. 265-270
In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consider an architectural modification we introduced in order to extend the reference processo...
 
Flexible Power Modeling for Wireless Systems: Power Modeling and Optimization of two Bluetooth Implementations
Found in: A World of Wireless, Mobile and Multimedia Networks, International Symposium on
By Luca Negri, Mariagiovanna Sami, Que Dung Tran, Davide Zanetti
Issue Date:June 2005
pp. 408-416
Battery-powered mobile devices featuring wireless connectivity are becoming part of everyday life. In a functional breakdown of their power budget, communication accounts for a steadily increasing share of the total power; this is pushing research on power...
 
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Domenico Barretta, William Fornaciari, Mariagiovanna Sami, Daniele Bagni
Issue Date:March 2005
pp. 748-749
Instruction Level Parallelism (ILP) extraction for multi-cluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and thread level parallelism jointly, thus allowing an easier parallelism extra...
   
Embedded Systems Education: How to Teach the Required Skills?
Found in: Hardware/software codesign and system synthesis, International conference on
By Peter Marwedel, Daniel Gajski, Erwin De Kock, Hugo De Man, Peter Marwedel, Mariagiovanna Sami, Ingemar Söderquist
Issue Date:September 2004
pp. 254-255
The goal of this panel is to contrast existing approaches to embedded system education with the needs in industry.
   
FSM-Based Power Modeling of Wireless Protocols: the Case of Bluetooth
Found in: Low Power Electronics and Design, International Symposium on
By Luca Negri, David Macii, Mariagiovanna Sami, Alessandra Terranegra
Issue Date:August 2004
pp. 369-374
The proliferation of pervasive computing applications relying on battery
 
SIMD Extension to VLIW Multicluster Processors for Embedded Applications
Found in: Computer Design, International Conference on
By Domenico Barretta, William Fornaciari, Mariagiovanna Sami, Danilo Pau
Issue Date:September 2002
pp. 523
We propose a retargetable architecture, based on a multicluster VLIW processor, that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may inc...
 
On-line Diagnosis and Reconfiguration of FPGA Systems
Found in: Electronic Design, Test and Applications, IEEE International Workshop on
By Anna Antola, Mariagiovanna Sami, Vincenzo Piuri
Issue Date:January 2002
pp. 291
Fault tolerance is becoming an important issue for the effective use of FPGA-based architectures in mission-critical applications. This paper introduces an innovative approach to design FPGA systems with on-line diagnosis and reconfiguration, at a limited ...
 
Semiconcurrent Error Detection in Data Paths
Found in: IEEE Transactions on Computers
By Anna Antola, Fabrizio Ferrandi, Vincenzo Piuri, Mariagiovanna Sami
Issue Date:May 2001
pp. 449-465
<p><b>Abstract</b>—A high-level synthesis strategy is proposed for design of semiconcurrently self-checking devices. Attention is mainly focused on data path design. After identifying the reference architecture against which cost and perf...
 
High-level Synthesis of Data Paths with Concurrent Error Detection
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Anna Antola, Vincenzo Piuri, Mariagiovanna Sami
Issue Date:November 1998
pp. 292
High-level synthesis of data paths with concurrent self-checking abilities is discussed to balance redundancy, latency, and checking effectiveness. The nominal and the checking computations are scheduled and allocated contemporaneously by using a force-dir...
 
A Low-Redundancy Approach to Semi-Concurrent Error Detection in Data Paths
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Anna Antola, Vincenzo Piuri, Mariagiovanna Sami
Issue Date:February 1998
pp. 266
A high-level synthesis approach is proposed for design of semi-concurrently self-checking devices; attention is focussed on data path design. After identifying the reference architecture against which cost and performances should be evaluated, a simultaneo...
 
Semi-Concurrent Error Detection in Data Paths
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Anna Antola, Vincenzo Piuri, Mariagiovanna Sami
Issue Date:October 1997
pp. 298
An innovative approach for high-level synthesis of digital circuits with semi-concurrent self-checking abilities is introduced, achieving a compromise between redundancy and checking effectiveness. Attention is mainly focused on the data path, described as...
 
A High-Level Synthesis Approach to Optimum Design of Self-Checking Circuits
Found in: European Design Automation Conference with EURO-VHDL
By Anna Antola, Vincenzo Piuri, Mariagiovanna Sami
Issue Date:September 1996
pp. 0382
We present an innovative solution to design of self-checking systems implementing arithmetic algorithms. Rather than substituting self-checking units in system synthesized independently of self-checking requirements, we introduce self-checking in high-leve...
 
Context Reorder Buffer: An Architectural Support for Real-Time Processing on RISC Architectures
Found in: Real-Time Systems, Euromicro Conference on
By Pierguido V.C. Caironi, Lorenzo Mezzalira, Mariagiovanna Sami
Issue Date:June 1996
pp. 0262
In this article the authors present a hardware solution to the problem of precise interrupts and exceptions in superscalar RISC CPU architectures. This solution, called context reorder buffer (abbreviated as CRB), is based both on the reorder buffer archit...
 
Reconfigurable architectures for VLSl processing arrays
Found in: Managing Requirements Knowledge, International Workshop on
By Mariagiovanna Sami, Renato Stefanelli
Issue Date:May 1983
pp. 565
No summary available.
   
Power Exploration for Embedded VLIW Architectures
Found in: Computer-Aided Design, International Conference on
By Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria
Issue Date:November 2000
pp. 498
In this paper, we propose a system-level power exploration methodology for embedded VLIW architectures based on an instruction-level analysis. The instruction-level energy model targets a general pipeline scalar processor; several architectural parameters ...
 
Creating an embedded systems program from scratch: nine years of experience at ALaRI
Found in: Proceedings of the 2009 Workshop on Embedded Systems Education (WESS '09)
By Mariagiovanna Sami, Umberto Bondi
Issue Date:October 2009
pp. 3-7
In 1999, experts form academia and industry met in a workshop dealing with education in Embedded Systems Design: at the time there were no specifically oriented programs, and an "ideal" educational track was designed. One year later, that educational desig...
     
Embedded systems education: how to teach the required skills?
Found in: Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis (CODES+ISSS '04)
By Daniel Gajski, Erwin De Kock, Hugo De Man, Ingemar Soderquist, Mariagiovanna Sami, Peter Marwedel
Issue Date:September 2004
pp. 254-255
The goal of this panel is to contrast existing approaches to embedded system education with the needs in industry.
     
FSM--based power modeling of wireless protocols: the case of bluetooth
Found in: Proceedings of the 2004 international symposium on Low power electronics and design (ISLPED '04)
By Alessandra Terranegra, David Macii, Luca Negri, Mariagiovanna Sami
Issue Date:August 2004
pp. 369-374
The proliferation of pervasive computing applications relying on battery--powered devices and wireless connectivity is posing great emphasis on the issue of power optimization. While node--level models and approaches have been widely discussed, a problem r...
     
A DAG-based design approach for reconfigurable VLIW processors
Found in: Proceedings of the conference on Design, automation and test in Europe (DATE '99)
By Cesare Alippi, Laura Pozzi, Mariagiovanna Sami, William Fornaciari
Issue Date:January 1999
pp. 57-es
In this paper, we consider the new and evocative work on tangible interfaces and the issues this raises in the light of some old lessons of HCI. In doing so, we make the point that many of these lessons of good design still apply, even when we are consider...
     
 1