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Displaying 1-50 out of 109 total
Circuit-Level Considerations for Mixed-Signal Programmable Components
Found in: IEEE Design and Test of Computers
By Luigi Carro, Marcelo Negreiros, Gabriel Parmegiani Jahn, Adão Antônio de Souza Jr., Denis Teixeira Franco
Issue Date:January 2003
pp. 76-84
<p>The use of digital compensation algorithms eliminates the error introduced by switches and the nonlinear behavior of MOS transistors. This approach greatly reduces analog area and permits field-programmable mixed-signal systems built with entirely...
 
Making Java Work for Microcontroller Applications
Found in: IEEE Design and Test of Computers
By Sérgio Akira Ito, Luigi Carro, Ricardo Pezzuol Jacobi
Issue Date:September 2001
pp. 100-110
<p>The authors investigate complete system development using a Java machine aimed at FPGA devices. A new design strategy targets a single FPGA chip, within which the dedicated Java microcontroller-FemtoJava-is synthesized.</p>
 
Radiation Sensitivity of High Performance Computing Applications on Kepler-Based GPGPUs
Found in: 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
By Daniel A.G. Oliveira,Caio B. Lunardi,Laercio L. Pilla,Paolo Rech,Philippe O.A. Navaux,Luigi Carro
Issue Date:June 2014
pp. 732-737
In this paper we assess and discuss the radiation sensitivity of a set of HPC applications executed on NVIDIA K20 GPGPUs. The occurrence of both radiation-induced silent data corruption and functional interruption will be experimentally addressed for Hotsp...
 
Adaptive Low-Power Architecture for High-Performance and Reliable Embedded Computing
Found in: 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
By Ronaldo R. Ferreira,Jean da Rolt,Gabriel L. Nazar,Alvaro F. Moreira,Luigi Carro
Issue Date:June 2014
pp. 538-549
This paper presents the Matrix Operation Microprocessor Architecture (MoMa) for reliable embedded computing. MoMa introduces a software execution mechanism based on transactions, which provides a localized error correction scheme that leads to reduced erro...
 
A New Memory Banking System for Energy-Efficient Wireless Sensor Networks
Found in: 2013 IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS)
By Leonardo Steinfeld,Fernando Silveira,Marcus Ritt,Luigi Carro
Issue Date:May 2013
pp. 215-222
The ever-increasing complexity of applications covered by wireless sensor networks (WSNs) demands for increasing memory size, which in turn increases the power drain. It is well known that SRAM power consumption can be reduced by employing a banked structu...
 
Exploiting Modified Placement and Hardwired Resources to Provide High Reliability in FPGAs
Found in: Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
By Gabriel L. Nazar,Luigi Carro
Issue Date:May 2012
pp. 149-152
Possible scenarios for future manufacturing technologies increase the desirable features of fault tolerance techniques, such as coping with multiple faults and reducing error latency. On the other hand, current high-end FPGAs present, besides lookup tables...
 
Performance Overhead from the Usage of Software Abstraction on Complex Embedded Systems
Found in: Computing System Engineering, Brazilian Symposium on
By Vesmar Bóris Camara C.,Ulisses B. Corrêa,Luigi Carro
Issue Date:November 2011
pp. 111-114
Abstract -- Nowadays major embedded systems functionalities are developed in software. Moreover, to attend the market exigencies the software productivity has to be improves. This work analyzes the overhead caused by the application of abstraction levels i...
 
An Area Effective Parity-Based Fault Detection Technique for FPGAs
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Gabriel L. Nazar,Luigi Carro
Issue Date:October 2011
pp. 27-33
Field programmable gate arrays (FPGAs) are highly successful platforms in a variety of niches, such as telecommunications and automotive applications. Their usage in critical systems for radiation environments, however, still depends on techniques able to ...
 
Decimal Hamming: A Software-Implemented Technique to Cope with Soft Errors
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Costas Argyrides,Ronaldo Rodrigues Ferreira,Carlos A. Lisboa,Luigi Carro
Issue Date:October 2011
pp. 11-17
A low-overhead technique for correction of induced errors affecting algorithms and their data based on the concepts behind Hamming code is presented and evaluated. We go beyond Hamming code by computing the check digits as decimal sums, and using a checker...
 
A New Soft-Error Resilient Voltage-Mode Quaternary Latch
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Eduardo Rhod, Luca Sterpone, Luigi Carro
Issue Date:October 2010
pp. 200-208
Multiple-valued logic circuits represent nowadays a new technology challenge to realize integrated circuits using less silicon area and having low power and high frequencies characteristics. Above this technology, quaternary logic is increasingly attractiv...
 
System Level Hardening by Computing with Matrices
Found in: Digital Systems Design, Euromicro Symposium on
By Ronaldo Rodrigues Ferreira, Álvaro Freitas Moreira, Luigi Carro
Issue Date:September 2010
pp. 373-379
Continuous advances in transistor manufacturing have enabled technology scaling along the years, sustaining Moore's law. As transistors sizes rapidly shrink, and voltage scales, the amount of charge in a node also rapidly decreases. A particle hitting the ...
 
A Cost-Effective Technique for Mapping BLUTs to QLUTs in FPGAs
Found in: International Conference on Field Programmable Logic and Applications
By Marcus Ritt, Carlos Arthur Lang Lisboa, Luigi Carro, Cristiano Lazzari
Issue Date:September 2010
pp. 332-335
Quaternary logic has shown to be a promising alternative for implementing FPGAs, since voltage mode quaternary circuits can reduce the circuits' cost and at the same time reduce its power consumption. In this paper, we study the implementation of circuits ...
 
Towards Estimating Physical Properties of Embedded Systems using Software Quality Metrics
Found in: Computer and Information Technology, International Conference on
By Ulisses Brisolara Corrêa, Luis Lamb, Luigi Carro, Lisane Brisolara, Júlio Mattos
Issue Date:July 2010
pp. 2381-2386
The complexity of embedded devices poses new challenges to embedded software development in addition to the traditional physical requirements. Therefore, the evaluation of the quality of embedded software and its impact on these traditional properties beco...
 
TLP and ILP exploitation through a reconfigurable multiprocessor system
Found in: Parallel and Distributed Processing Workshops and PhD Forum, 2011 IEEE International Symposium on
By Mateus B. Rutzig,Felipe Madruga,Marco A. Alves,Henrique Cota,Antonio C.S. Beck,Nicolas Maillard,Philippe O. A. Navaux,Luigi Carro
Issue Date:April 2010
pp. 1-8
Limits of instruction level parallelism and the higher transistor density sustain the increasing need for multiprocessor systems: they are rapidly taking over both general purpose and embedded processor domains. Nowadays, since these processors must handle...
 
A low-energy approach for context memory in reconfigurable systems
Found in: Parallel and Distributed Processing Workshops and PhD Forum, 2011 IEEE International Symposium on
By Thiago Berticelli Lo,Antonio Carlos S. Beck,Mateus Beck Rutzig,Luigi Carro
Issue Date:April 2010
pp. 1-8
In most of the works concerning reconfigurable computing, the main objective is system optimization by taking into account the known requirements of a project, such as speedup, energy or area. However, as it will be shown in this paper, although very signi...
 
Dynamically Adapted Low-Energy Fault Tolerant Processors
Found in: Adaptive Hardware and Systems, NASA/ESA Conference on
By Monica Magalhães Pereira, Luigi Carro
Issue Date:August 2009
pp. 91-97
The constant advances on scaling have introduced several issues to the design of processing structures in new technologies. The closer one gets to nano-scale devices, the more necessary are methods to develop circuits that are able to tolerate high defect ...
 
Invariant checkers: An efficient low cost technique for run-time transient errors detection
Found in: On-Line Testing Symposium, IEEE International
By Carmela Noro Grando, Carlos Arthur Lisboa, Alvaro Freitas Moreira, Luigi Carro
Issue Date:June 2009
pp. 35-40
Semiconductor technology evolution brings along higher soft error rates and long duration transients, which require new low cost system level approaches for error detection and mitigation. Known software based error detection techniques imply a high overhe...
 
NoC Power Optimization Using a Reconfigurable Router
Found in: VLSI, IEEE Computer Society Annual Symposium on
By Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz
Issue Date:May 2009
pp. 235-240
In real applications there are different communication needs among the cores. When NoCs are the means to interconnect the cores, the use of some techniques to optimize the communication are indispensable. From the performance point of view, large buffer si...
 
A low cost and adaptable routing network for reconfigurable systems
Found in: Parallel and Distributed Processing Symposium, International
By Ricardo Ferreira,Marcone Laure,Antonio C. Beck, Thiago Lo,Mateus Rutzig,Luigi Carro
Issue Date:May 2009
pp. 1-8
Nowadays, scalability, parallelism and fault-tolerance are key features to take advantage of last silicon technology advances, and that is why reconfigurable architectures are in the spotlight. However, one of the major problems in designing reconfigurable...
 
Increasing memory yield in future technologies through innovative design
Found in: Quality Electronic Design, International Symposium on
By Costas Argyrides, Ahmad Al-Yamani, Carlos Lisboa, Luigi Carro, Dhiraj Pradhan
Issue Date:March 2009
pp. 622-626
Future technologies, with ever shrinking devices and higher densities, bring along higher defect rates and lower yield. Memory chips, which are among the densest circuits used in digital systems, are greatly impacted by the increasing defect rates, which m...
 
Balancing reconfigurable data path resources according to application requirements
Found in: Parallel and Distributed Processing Symposium, International
By Mateus Beck Rutzig, Antonio Carlos S. Beck, Luigi Carro
Issue Date:April 2008
pp. 1-8
Processor architectures are changing mainly due to the excessive power dissipation and the future break of Moore’s law. Thus, new alternatives are necessary to sustain the performance increase of the processors, while still allowing low energy computations...
 
Software Quality Metrics and their Impact on Embedded Software
Found in: Model-Based Methodologies for Pervasive and Embedded Software, International Workshop on
By Marcio F.S. Oliveira, Ricardo Miotto Redin, Luigi Carro, Luís da Cunha Lamb, Flávio Rech Wagner
Issue Date:April 2008
pp. 68-77
Although many improvements for software development are proposed by software engineers, the embedded system community faces a hard task in applying these improvements to software development, due to the strong dependence between software and hardware in em...
 
Using UML as Front-end for Heterogeneous Software Code Generation Strategies
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Lisane B. Brisolara, Marcio F.S. Oliveira, Ricardo Redin, Luis C. Lamb, Luigi Carro, Flavio Wagner
Issue Date:March 2008
pp. 504-509
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FSM). An automatic synthesis of an executable and synthesizable Simulink model ...
 
Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Antonio Carlos S. Beck, Mateus B. Rutzig, Georgi Gaydadjiev, Luigi Carro
Issue Date:March 2008
pp. 1208-1213
Embedded systems are becoming increasingly complex. Besides the additional processing capabilities, they are characterized by high diversity of computational models coexisting in a single device. Although reconfigurable architectures have already shown to ...
 
Spare Parts in Analog Circuits: a Filter Example
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Erik Schuler, Adão Júnior Antônio de Souza, Luigi Carro
Issue Date:September 2007
pp. 321-330
Spare parts technique has been widely used in digital designs. As memory cells are more susceptible to defects and faults than logic cells, redundancy has been extensively used for enhancing defect and fault tolerance through repair by spare replacement. T...
 
Crosstalk- and SEU-Aware Networks on Chips
Found in: IEEE Design and Test of Computers
By Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, Érika Cota, Luigi Carro
Issue Date:July 2007
pp. 340-350
This article proposes the use of mixed hardware-software solutions to simultaneously address crosstalk faults and single-event upsets in on-chip networks. After analyzing the susceptibility of routers to these faults, the authors propose a software-based s...
 
Quaternary Look-Up Tables Using Voltage-Mode CMOS Logic Design
Found in: Multiple-Valued Logic, IEEE International Symposium on
By Ricardo Cunha, Henri Boudinov, Luigi Carro
Issue Date:May 2007
pp. 56
Data processing optimization is one of the main concerns for developing of multiple-valued logic. An advantage could be achieved by realization of new functions existing in non-binary logic. These new logic functions could be implemented using quaternary l...
 
A Digitally Testable Capacitance-Insensitive Mixed-Signal Filter
Found in: European Test Symposium, IEEE
By Erik Schuler, Marcelo Negreiros, Pascal Nouet, Luigi Carro
Issue Date:May 2007
pp. 21-28
One of the main problems when developing analog filters in VLSI is to achieve high accuracy regarding the cutoff frequency. This is mainly due to the difficulty in obtaining accurate time constants. Testing of such filters is also challenging, in the sense...
 
Digital Generation of Signals for Low Cost RF BIST
Found in: European Test Symposium, IEEE
By Marcelo Negreiros, Luigi Carro, Altamiro A. Susin
Issue Date:May 2007
pp. 49-54
RF test signals are a requirement for the implementation of effective BIST techniques in transceivers. In this work a method to encode a binary signal with the desired RF frequency is presented. The approach employs high-pass sigma delta modulators, in con...
 
RF Digital Signal Generation Beyond Nyquist
Found in: VLSI Test Symposium, IEEE
By Marcelo Negreiros, Adão Souza Jr., Luigi Carro, Altamiro Amadeu Susin
Issue Date:May 2007
pp. 15-22
This paper discusses low cost RF signal generation for BIST, using only digital circuits. One major problem is the range of frequencies that can be achieved by any digital signal generator, since the Nyquist limit is the clock frequency divided by 2 (FS/2)...
 
Object-Oriented Reconfiguration
Found in: Rapid System Prototyping, IEEE International Workshop on
By Julio C. B. Mattos, Antonio Carlos S. Beck, Luigi Carro
Issue Date:May 2007
pp. 69-74
As embedded systems are getting more complex, they are also presenting more stringent constraints like performance, power consumption, memory footprint and so on. At the same time, because of market pressures, their development time must be constantly redu...
 
Transparent Dataflow Execution for Embedded Applications
Found in: VLSI, IEEE Computer Society Annual Symposium on
By Mateus B. Rutzig, Antonio Carlos S. Beck, Luigi Carro
Issue Date:March 2007
pp. 47-54
The development of embedded systems is getting more complex. With severe power constraints and with the necessity of shrinking time-to-market, designers face the challenge of increasing the performance to sustain new functionalities added day by day. Dataf...
 
The Molen FemtoJava Engine
Found in: Application-Specific Systems, Architectures and Processors, IEEE International Conference on
By Julio C. B. Mattos, Stephan Wong, Luigi Carro
Issue Date:September 2006
pp. 19-22
This paper presents the Molen FemtoJava engine that is extended with concepts taken from the Molen polymorphic processor. This allows for the existing FemtoJava to be augmented with reconfigurable hardware with only a single extension of the bytecodes and ...
 
Early Embedded Software Design Space Exploration Using UML-Based Estimation
Found in: Rapid System Prototyping, IEEE International Workshop on
By Marcio F. da S. Oliveira, Lisane B. de Brisolara, Luigi Carro, Flávio R. Wagner
Issue Date:June 2006
pp. 24-32
In order to quickly implement an embedded system that is mainly based on software, two orthogonal approaches have been proposed: Platform-based Design, which maximizes the reuse of components; and Model Driven Development, which rises the abstraction level...
 
Evaluating Sigma-Delta Modulated Signals to Develop Fault-Tolerant Circuits
Found in: European Test Symposium, IEEE
By Erik Schüler, Daniel Scain Farenzena, Luigi Carro
Issue Date:May 2006
pp. 137-144
As microelectronics evolves smaller into the nanometric scale, external interferences starts to be harmful to the system expected behavior. As classical systems do not handle adequately faults caused by such sources, new topologies are proposed. Our presen...
 
Reliable Digital Circuits Design using Sigma-Delta Modulated Signals
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Erik Schuler, Luigi Carro
Issue Date:October 2005
pp. 314-324
<p>As the transistor gate length goes straightforward to the sub-micron dimension, the possibilities of occurrence of external interferences in these devices also increase. Moreover, the process variability will further degrade this scenario. The dir...
 
Adding value to design and test through education: What are the challenges?
Found in: IEEE Design and Test of Computers
By Luigi Carro
Issue Date:July 2005
pp. 388, 390
The 6th IEEE Latin American Test Workshop (LATW 05) included a panel discussion on the challenges for modern design and test education. Luigi Carro organized the panel discussion and Magdy Abadir of served as moderator. Participants included Jos? Luis Huer...
 
Increasing Fault Tolerance to Multiple Upsets Using Digital Sigma-Delta Modulators
Found in: On-Line Testing Symposium, IEEE International
By Erik Schüler, Luigi Carro
Issue Date:July 2005
pp. 255-259
As the transistor gate length goes straightforward to the sub-micron dimension, there is an increased possibility of occurrence of external interferences in these devices. The direct effect of such external and/or intrinsic interferences is, in many cases,...
 
Application of Binary Translation to Java Reconfigurable Architectures
Found in: Parallel and Distributed Processing Symposium, International
By Antonio C. S. Beck, Luigi Carro
Issue Date:April 2005
pp. 156b
In this paper we present the impact of applying binary translation to a reconfigurable architecture able to execute Java bytecodes. Besides ensuring software compatibility and porting for different machines tracking technological evolutions, the dynamic tr...
 
Noise Figure Evaluation Using Low Cost BIST
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Marcelo Negreiros, Luigi Carro, Altamiro A. Susin
Issue Date:March 2005
pp. 158-163
A technique for evaluating noise figure suitable for BIST implementation is described. It is based on a low cost single-bit digitizer, which allows the simultaneous evaluation of noise figure in several test points of the analog circuit. The method is also...
 
Designing Fault-Tolerant Techniques for SRAM-Based FPGAs
Found in: IEEE Design and Test of Computers
By Fernanda Gusmao de Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis
Issue Date:November 2004
pp. 552-562
<it>Editors' note: </it>FPGAs have become prevalent in critical applications in which transient faults can seriously affect the circuit's operation. This article presents a fault tolerance technique for transient and permanent faults in SRAM-ba...
 
Robust Low-Cost Analog Signal Acquisition with Self-Test Capabilities
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Adão A. de Souza Jr., Luigi Carro
Issue Date:October 2004
pp. 239-247
An architecture based on parallel statistical sampler with digital post-processing is proposed to provide graceful performance degradation of data acquisition under a multiple failure scenario. After a self-configuration stage, an adaptive procedure keeps ...
 
Towards a BIST Technique for Noise Figure Evaluation
Found in: European Test Symposium, IEEE
By Marcelo Negreiros, Luigi Carro, Altamiro A. Susin
Issue Date:May 2004
pp. 122-126
This work presents some results regarding the development of a BIST technique capable of noise figure evaluation. Noise figure is an important parameter in the specification and design of low noise systems, such as communications systems and biomedical ins...
 
Low Cost Analog Testing of RF Signal Paths
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Marcelo Negreiros, Luigi Carro, Altamiro A. Susin
Issue Date:February 2004
pp. 10292
A low cost method for testing analog RF signal paths suitable for BIST implementation in a SoC environment is described. The method is based on the use of a simple and low-cost one-bit digitizer that enables the reuse of processor and memory resources avai...
 
Highly Digital, Low-Cost Design of Statistic Signal Acquisition in SoCs
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Adão A. S. Júnior, Luigi Carro
Issue Date:February 2004
pp. 30010
Presently, the gap between analog and digital processes is ever increasing. Although digital circuits are still obeying Moore?s law, their analog counterparts follow far behind. Since signal acquisition, through ADC circuits is an often required feature, f...
 
CACO-PS: A General Purpose Cycle-Accurate Configurable Power Simulator
Found in: Integrated Circuit Design and System Design, Symposium on
By Antonio C. S. Beck Filho, Julio C. B. Mattos, Flávio R. Wagner, Luigi Carro
Issue Date:September 2003
pp. 349
This paper presents a cycle-accurate and configurable simulator that estimates the power consumed by an embedded system. The simulator accepts as input a structural system architecture description, at a level of abstraction that can be configured by the us...
 
A Universal High-Performance Analog Interface for Signal Processing SOCs
Found in: Integrated Circuit Design and System Design, Symposium on
By Eric E. Fabris, Luigi Carro, Sergio Bampi
Issue Date:September 2003
pp. 137
Integrated circuit technology evolution boosts the development of system-on-a-chip (SOC) applications. These applications usually integrate digital blocks and may, for extended functionality, include also analog interface circuits in the same die. However,...
 
Power-aware NoC Reuse on the Testing of Core-based Systems
Found in: Test Conference, International
By Érika Cota, Luigi Carro, Flávio Wagner, Marcelo Lubaszewski
Issue Date:October 2003
pp. 612
This work discusses the impact of power consumption on the test time of core-based systems, when an available on-chip network is reused as test access mechanism. A previously proposed technique for the reuse of an on-chip network is extended to consider po...
 
Testing RF Signal Paths Using Spectral Analysis and Subsampling
Found in: Integrated Circuit Design and System Design, Symposium on
By Marcelo Negreiros, Erik Schuler, Luigi Carro, Altamiro A. Susin
Issue Date:September 2003
pp. 329
The focus of this work is the testing of RF signal paths, specially mixers. The presented technique is based on spectral analysis and subsampling. It enables the partitioning of the RF signal path, making it easier to locate faulty stages. A synchronizatio...
 
Designing Fault Tolerant Systems into SRAM-based FPGAs
Found in: Design Automation Conference
By Fernanda Lima, Luigi Carro, Ricardo Reis
Issue Date:June 2003
pp. 650
This paper discusses high level techniques for designing fault tolerant systems in SRAM-based FPGAs, without modification in the FPGA architecture. Triple Modular Redundancy (TMR) has been successfully applied in FPGAs to mitigate transient faults, which a...
 
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