Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs
On-Line Testing Symposium, IEEE International
By Jose Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt
Issue Date:June 2009
This paper presents an innovative method that allows the use of dynamic partial reconfiguration combined with triple modular redundancy (TMR) in SRAM-based FPGAs fault-tolerant designs. The method combines large grain TMR with special voters capable of sig...