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Displaying 1-9 out of 9 total
Benefits and Challenges for Platform-Based Design
Found in: Design Automation Conference
By Alberto Sangiovanni-Vincentelli, Luca Carloni, Fernando De Bernardinis, Marco Sgroi
Issue Date:June 2004
pp. 409-414
Platforms have become an important concept in the design of electronic systems. We present here the motivations behind the interest shown and the challenges that we have to face to make the Platform-based Design method a standard. As a generic term, platfo...
 
Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing
Found in: SC Conference
By Gilbert Hendry, Eric Robinson, Vitaliy Gleyzer, Johnnie Chan, Luca Carloni, Nadya Bliss, Keren Bergman
Issue Date:November 2010
pp. 1-12
As advancements in CMOS technology trend toward ever increasing core counts in chip multiprocessors for high-performance embedded computing, the discrepancy between on- and off-chip communication bandwidth continues to widen due to the power and spatial co...
 
Modeling of Substrate Noise Injected by Digital Libraries
Found in: Quality Electronic Design, International Symposium on
By Stefano Zanella, Andrea Neviani, Enrico Zanoni, Paolo Miliozzi, Edoardo Charbon, Carlo Guardiani, Luca Carloni, Alberto Sangiovanni-Vincentelli
Issue Date:March 2001
pp. 488
Switching noise is one of the major sources of timing errors and functional hazards in logic circuits. It is caused by the cumulative effect of microscopic spurious currents arising in all devices during logic transitions. These currents are injected into ...
 
A method to abstract RTL IP blocks into C++ code and enable high-level synthesis
Found in: Proceedings of the 50th Annual Design Automation Conference (DAC '13)
By Hung-Yi Liu, Luca Carloni
Issue Date:May 2013
pp. 1-9
We present a method to automatically generate a synthesizable C++ specification from the given RTL design of an IP block, by abstracting away most of its micro-architectural characteristics while preserving its functionality. The goal is twofold: recover t...
     
A complete framework for programming event-driven, self-reconfigurable low power wireless networks
Found in: Proceedings of the 9th ACM Conference on Embedded Networked Sensor Systems (SenSys '11)
By Luca Carloni, Marcin Szczodrak
Issue Date:November 2011
pp. 415-416
We present a complete framework to design and deploy adaptive low power wireless networks. The framework consists of Fennec Fox, a four-layer network protocol stack, and Swift Fox, a high-level programming language. At run-time, Fennec Fox dynamically reco...
     
Organic solar cell-equipped energy harvesting active networked tag (EnHANT) prototypes
Found in: Proceedings of the 9th ACM Conference on Embedded Networked Sensor Systems (SenSys '11)
By Alexander Smith, Baradwaj Vigraham, Gerald Stanje, Gil Zussman, Ioannis Kymissis, Jianxun Zhu, John Sarik, Luca Carloni, Marcin Szczodrak, Maria Gorlatova, Olivia Winn, Paul Miller, Peter Kinget, Robert Margolies
Issue Date:November 2011
pp. 385-386
Energy Harvesting Active Networked Tags (EnHANTs) will be a new class of devices in the domain between RFIDs and sensor networks. Small, flexible, and energetically self-reliant, EnHANTs will be attached to objects that are traditionally not networked, suc...
     
Demo: prototyping UWB-enabled enhants
Found in: Proceedings of the 9th international conference on Mobile systems, applications, and services (MobiSys '11)
By Baradwaj Vigraham, Gerald Stanje, Gil Zussman, Ioannis Kymissis, Jianxun Zhu, John Sarik, Luca Carloni, Marcin Szczodrak, Maria Gorlatova, Paul Miller, Peter Kinget, Robert Margolies, Zainab Noorbhaiwala
Issue Date:June 2011
pp. 387-388
Energy Harvesting Active Networked Tags (EnHANTs) are a new class of devices in the domain between RFIDs and sensor networks. EnHANTs will be small, flexible, and energetically self-reliant. Their development is enabled by advances in ultra-low-power ultra...
     
Emerging silicon photonics technologies for multi-core platform architectures
Found in: Proceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip (INA-OCMC '11)
By Luca Carloni
Issue Date:January 2011
pp. 1-1
The integration of emerging silicon photonics technologies with CMOS processes offers important advantages for the realization of scalable interconnection networks for both intra-chip and off-chip communication in next-generation multi-core computing platf...
     
Virtual channels vs. multiple physical networks: a comparative analysis
Found in: Proceedings of the 47th Design Automation Conference (DAC '10)
By Luca Carloni, Michele Petracca, Nicola Concer, Young Jin Yoon
Issue Date:June 2010
pp. 162-165
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoid deadlock and optimize the bandwidth of the physical channels in exchange fo...
     
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