Search For:

Displaying 1-5 out of 5 total
Predicting Architectural Vulnerability on Multithreaded Processors under Resource Contention and Sharing
Found in: IEEE Transactions on Dependable and Secure Computing
By Lide Duan, Lu Peng, Bin Li
Issue Date:March 2013
pp. 114-127
Architectural vulnerability factor (AVF) characterizes a processor's vulnerability to soft errors. Interthread resource contention and sharing on a multithreaded processor (e.g., SMT, CMP) shows nonuniform impact on a program's AVF when it is co-scheduled ...
Two-level soft error vulnerability prediction on SMT/CMP architectures
Found in: IEEE Workload Characterization Symposium
By Lide Duan,Lu Peng,Bin Li
Issue Date:November 2011
pp. 78
Architectural Vulnerability Factor (AVF) [3] quantifies the probability that a raw soft error finally produces a visible error in the program output. It is often used by computer designers as an important reliability metric at the architectural level. Howe...
Universal rules guided design parameter selection for soft error resilient processors
Found in: Performance Analysis of Systems and Software, IEEE International Symmposium on
By Lide Duan, Ying Zhang, Bin Li, Lu Peng
Issue Date:April 2011
pp. 247-256
High-performance processors suffer from soft error vulnerability due to the increasing on-chip transistor density, shrinking processor feature size, lower threshold voltage, etc. In this paper, we propose to use a rule search strategy, i.e. Patient Rule In...
Efficient Microarchitectural Vulnerabilities Prediction Using Boosted Regression Trees and Patient Rule Inductions
Found in: IEEE Transactions on Computers
By Bin Li, Lide Duan, Lu Peng
Issue Date:May 2010
pp. 593-607
The shrinking processor feature size, lower threshold voltage, and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerability Factor (AVF) reflects the possibility that a transient fault eventually ...
Comprehensive and Efficient Design Parameter Selection for Soft Error Resilient Processors via Universal Rules
Found in: IEEE Transactions on Computers
By Lide Duan,Ying Zhang,Bin Li,Lu Peng
Issue Date:September 2014
pp. 2201-2214
Soft errors have been significantly degrading the reliability of current processors whose feature sizes and supply voltages are fast scaling down. In this paper, we propose two effective approaches to characterize processor reliability against soft errors ...