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Displaying 1-5 out of 5 total
Multiple-Valued Memory Design by Standard BiCMOS Technique
Found in: Computer Science and Information Engineering, World Congress on
By Dong-Shong Liang, Kwang-Jow Gan, Jenq-Jong Lu, Cheng-Chi Tai, Cher-Shiung Tsai, Geng-Huang Lan, Yaw-Hwang Chen
Issue Date:April 2009
pp. 596-599
A novel multiple-valued memory circuit design using multiple-peak negative differential resistance (NDR) circuit based on standard SiGe process is demonstrated. The NDR circuit is designed based on the combination of metal-oxide-semiconductor field-effect-...
 
New D-Type Flip-Flop Design Using Negative Differential Resistance Circuits
Found in: Electronic Design, Test and Applications, IEEE International Workshop on
By Dong-Shong Liang, Kwang-Jow Gan
Issue Date:January 2008
pp. 258-261
A novel D-type flip-flop designed using negative differential resistance (NDR) circuit based on standard 0.35 ?m CMOS process is demonstrated. First we propose a new NDR circuit that is made of metal-oxide-semiconductor field-effect-transistor (MOS), but i...
 
Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits
Found in: System-on-Chip for Real-Time Applications, International Workshop on
By Dong-Shong Liang, Kwang-Jow Gan, Long-Xian Su, Chi-Pin Chen, Chung-Chih Hsiao, Cher Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang
Issue Date:July 2005
pp. 78-81
This paper describes the design of a four-valued memory cell based on a three-peak MOS-NDR circuit. We connect three MOS-NDR devices in parallel that can create a three-peak current-voltage curve by suitably arranging the parameters. Due to its folding IV ...
 
Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process
Found in: System-on-Chip for Real-Time Applications, International Workshop on
By Kwang-Jow Gan, Dong-Shong Liang, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Yaw-Hwang Chen, Shun-Huo Kuo, Chi-Pin Chen
Issue Date:July 2005
pp. 392-395
We propose a new MOS-NDR device that is composed of the metal-oxide-semiconductor field-effect-transistor (MOS) devices. This device could exhibit the negative differential resistance (NDR) characteristics in the current-voltage characteristics by suitably...
 
Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits
Found in: System-on-Chip for Real-Time Applications, International Workshop on
By Dong-Shong Liang, Kwang-Jow Gan, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang, Long-Xian Su
Issue Date:July 2005
pp. 372-375
This paper describes the design of a voltage-controlled oscillator (VCO) based on the negative differential resistance (NDR) devices. The NDR devices used in the work is fully composed by the metal-oxide- semiconductor field-effect-transistor (MOS) devices...
 
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