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Displaying 1-10 out of 10 total
Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors
Found in: IEEE Micro
By Vibhu Sharma,Stefan Cosemans,Maryam Ashouie,Jos Huisken,Francky Catthoor,Wim Dehaene
Issue Date:September 2012
pp. 10-24
Medical diagnosis and healthcare are at the onset of a revolution fueled by improvements in smart sensors and body area networks. Those sensor nodes' computation and memory requirements are growing, but their energy resources do not increase; thus, more en...
Extending Synchronization from Super-Threshold to Sub-threshold Region
Found in: Asynchronous Circuits and Systems, International Symposium on
By Jun Zhou, Maryam Ashouei, David Kinniment, Jos Huisken, Gordon Russell
Issue Date:May 2010
pp. 85-93
Ultra low voltage operation promises to reduce power dissipation for wireless sensor network applications. Such ultra low voltage systems are likely to have many sub-systems operating at different frequencies and VDDs from super-threshold to sub-threshold....
A Scalable Architecture for LDPC Decoding
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Mauro Cocco, John Dielissen, Marc Heijligers, Andries Hekstra, Jos Huisken
Issue Date:February 2004
pp. 30088
Low Density Parity Check (LDPC) codes offer excellent error correcting performance. However, current implementations are not capable of achieving the performance required by next generation storage and telecom applications. Extrapolation of many of those d...
Power-Efficient Layered Turbo Decoder Processor
Found in: Design, Automation and Test in Europe Conference and Exhibition
By J. Dielissen, J. Van Meerbergen, Marco Bekooij, Fran├žoise Harmsze, Jos Huisken, Albert Van der Werf, Sergej Sawitzki
Issue Date:March 2001
pp. 0246
Abstract: Turbo decoding offers outstanding error correcting capabilities, that will be used in wireless applications like the Universal Mobile Telecom Standard [4] (UMTS). However, the algorithm is very computational intensive, and therefore an implementa...
[2010] Energy Efficiency Using Loop Buffer based Instruction Memory Organizations
Found in: 2010 International Workshop on Innovative Architecture for Future-Generation High-Performance Processors and Systems (IWIA)
By Antonio Artes,Filipa Duarte,Maryam Ashouei,Jos Huisken,Jose L. Ayala,David Atienza,Francky Catthoor
Issue Date:January 2010
pp. 59-67
Energy consumption in embedded systems is strongly dominated by instruction memory organizations. Based on this, any architectural enhancement introduced in this component will produce a significant reduction of the total energy bud-get of the system. Loop...
A Scalable Implementation of a Reconfigurable WCDMA Rake Receiver
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Marc Quax, Jos Huisken, Jef van Meerbergen
Issue Date:February 2004
pp. 30230
The demands in terms of processing performance, communication bandwidth and real-time throughput of new generation mobile communication applications (mobile and base-stations) are much higher than today's programmable processing architectures can deliver. ...
A dual-core system solution for wearable health monitors
Found in: Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI (GLSVLSI '11)
By Anteneh Abbo, Antoine Fraboulet, Frank Bouwens, Harmke De Groot, Jef van Meerbergen, Jos Huisken, Martijn Bennebroek, Octavio Santana
Issue Date:May 2011
pp. 379-382
This paper presents a system design study for wearable sensor devices intended for healthcare and lifestyle applications based on ECG, EEG and activity monitoring. In order to meet the low-power requirement of these applications, a dual-core signal process...
Automatic synthesis of near-threshold circuits with fine-grained performance tunability
Found in: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design (ISLPED '10)
By Antonio Pullini, Ashoka Sathanur, Jos Huisken, Luca Benini, Mohammad Reza Kakoee
Issue Date:August 2010
pp. 401-406
Near-Threshold Circuits achieve ultra-low energy operating with significant performance improvement and noise immunity as compared to sub-threshold circuits. However, near-threshold circuit performance is highly sensitive to static and dynamic threshold vo...
CoMPSoC: A template for composable and predictable multi-processor system on chips
Found in: ACM Transactions on Design Automation of Electronic Systems (TODAES)
By Andreas Hansson, Jos Huisken, Kees Goossens, Marco Bekooij
Issue Date:January 2009
pp. 1-24
A growing number of applications, often with firm or soft real-time requirements, are integrated on the same System on Chip, in the form of either hardware or software intellectual property. The applications are started and stopped at run time, creating di...
Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip
Found in: Proceedings of the conference on Design, automation and test in Europe (DATE '07)
By Akash Kumar, Andreas Hansson, Henk Corporaal, Jos Huisken
Issue Date:April 2007
pp. 117-122
Multi-Processor System on Chip (MPSoC) platforms are becoming increasingly more heterogeneous and are shifting towards a more communication-centric methodology. Networks on Chip (NoC) have emerged as the design paradigm for scalable on-chip communication a...