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Displaying 1-7 out of 7 total
Silicon Photonic Interconnects for Large-Scale Computer Systems
Found in: IEEE Micro
By Ron Ho,Philip Amberg,Eric Chang,Pranay Koka,Jon Lexau,Guoliang Li,Frankie Y. Liu,Herb Schwetman,Ivan Shubin,Hiren D. Thacker,Xuezhe Zheng,John E. Cunningham,Ashok V. Krishnamoorthy
Issue Date:January 2013
pp. 68-78
Optical interconnects play an integral role in large-scale digital computing, switching, and routing systems. The authors describe a path toward future many-chip modules based on silicon photonic interposers that stitch together tens of chips in a dense an...
An Evaluation of Asynchronous Stacks
Found in: IEEE Design and Test of Computers
By Jo Ebergen,Daniel Finchelstein,Russell Kao,Jon Lexau,David Hopkins
Issue Date:September 2011
pp. 52-61
Editors' note:This article presents a case study of a fast and energy-efficient hardware implementation of a stack. The design is highly scalable, as its cycle time remains unchanged and energy per operation grows very slowly, with an increase in the numbe...
Clocking Links in Multi-chip Packages: A Case Study
Found in: High-Performance Interconnects, Symposium on
By Tamer Ali, Dinesh Patil, Frankie Liu, Elad Alon, Jon Lexau, Chih-Kong Ken Yang, Ron Ho
Issue Date:August 2010
pp. 96-103
This brief note presents a case study for clocking links in multi-chip packages. A particular co-packaged multichip system design based on multi-Gbps silicon photonics global interconnect provides the context for our study of near-short range links, and we...
Optical Interconnect for High-End Computer Systems
Found in: IEEE Design and Test of Computers
By Ron Ho, Frankie Liu, Dinesh Patil, Xuezhe Zheng, Guoliang Li, Ivan Shubin, Elad Alon, Jon Lexau, Herb Schwetman, John E. Cunningham, Ashok V. Krishnamoorthy
Issue Date:July 2010
pp. 10-19
<p><it>Editor's note</it>:</p><p>Advances in silicon photonic technology have made possible the use of optical communication in large-scale chip arrays. This article shows how such a structure utilizes the high bandwidth of th...
GasP Control for Domino Circuits
Found in: Asynchronous Circuits and Systems, International Symposium on
By Jo Ebergen, Jonathan Gainsley, Jon Lexau, Ivan Sutherland
Issue Date:March 2005
pp. 12-22
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare favorably with previously published control circuits. We present some result...
A Fast and Energy-Efficient Stack
Found in: Asynchronous Circuits and Systems, International Symposium on
By Jo Ebergen, Daniel Finchelstein, Russell Kao, Jon Lexau, David Hopkins
Issue Date:April 2004
pp. 7-16
We present some novel hardware implementations of a stack. All designs are clockless, fast, and energy efficient, while occupying modest area. We implemented a 42-place stack chip with a family of GasP circuits, making use of automatic transistor sizing an...
A Counterflow Pipeline Experiment
Found in: Asynchronous Circuits and Systems, International Symposium on
By Bill Coates, Jo Ebergen, Jon Lexau, Scott Fairbanks, Ian Jones, Alex Ridgway, David Harris, Ivan Sutherland
Issue Date:April 1999
pp. 161
The counterflow pipeline architecture [Sproull94] consists of two interacting pipelines in which data items flow in opposite directions. Interactions occur between two items when they meet in a stage. We present the design decisions for, and test measureme...