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An Intelligent RAM with Serial I/Os
Found in: IEEE Micro
By Bendik Kleveland,Michael John Miller,Ronald B. David,Jay Patel,Rajesh Chopra,Dipak K. Sikdar,Jeff Kumala,Socrates D. Vamvakos,Mike Morrison,Ming Liu,Jayaprakash Balachandran
Issue Date:November 2013
pp. 56-65
Memory access rate is a primary performance bottleneck in high-performance networking systems. The MoSys Bandwidth Engine family of integrated circuits provides a significant improvement in effective memory performance by using high-speed serial I/O's, man...