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An Alternative Memory Access Scheduling in Manycore Accelerators
Parallel Architectures and Compilation Techniques, International Conference on
By Yonggon Kim,Hyunseok Lee,John Kim
Issue Date:October 2011
Memory controllers in graphics processing units (GPU) often employ out-of-order scheduling to maximize row access locality. However, this requires complex logic to enable out-of-order scheduling compared with in-order scheduling. To provide a low-cost and ...
SODA: A High-Performance DSP Architecture for Software-Defined Radio
By Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner
Issue Date:January 2007
Software-defined radio (SDR) belongs to an emerging class of applications with the processing requirements of a supercomputer but the power constraints of a mobile terminal. The authors developed the Signal-Processing On-Demand Architecture (SODA), a fully...
SODA: A Low-power Architecture For Software Radio
Computer Architecture, International Symposium on
By Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztian Flautner
Issue Date:June 2006
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a minimum. These implementations are time consuming to design and difficult to ...
Reducing idle mode power in software defined radio terminals
Found in: Proceedings of the 2006 international symposium on Low power electronics and design (ISLPED '06)
By Chaitali Chakrabarti, Hyunseok Lee, Trevor Mudge
Issue Date:October 2006
In this paper, we propose a processor which is optimized for idle mode operation of a software defined radio (SDR) terminal. Since a SDR terminal spends most of its time in the idle mode, reducing the power consumption in this mode directly translates to l...
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