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Handling Nondeterminism in Logic Simulation So That Your Waveform Can Be Trusted Again
Found in: IEEE Design and Test of Computers
By Kai-hui Chang,Hong-Zu Chou,Haiqian Yu,Dylan Dobbyn,Sy-Yen Kuo
Publication Date: June 2011
pp. N/A
The increasing complexity of integrated circuits pushes for more aggressive design optimizations, such as resetting only part of design registers, that can leave some registers in nondeterministic (X) states. Such Xs may invalidate the correctness of logic...
 
RTL analysis and modifications for improving at-speed test
Found in: 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE 2012)
By Kai-Hui Chang, Hong-Zu Chou,I. L. Markov
Issue Date:March 2012
pp. 400-405
At-speed testing is increasingly important at recent technology nodes due to growing uncertainty in chip manufacturing. However, at-speed fault coverage and test-efficacy suffer when tests are not robust. Since Automatic Test Pattern Generation (ATPG) is t...
 
A Randomized Distributed Algorithm for Peer-to-Peer Data Replication in Wireless Ad Hoc Networks
Found in: Pacific Rim International Symposium on Dependable Computing, IEEE
By Hong-Zu Chou, Szu-Chi Wang, Sy-Yen Kuo
Issue Date:December 2007
pp. 163-170
In this paper, we focus on enhancing the data accessibility of ad hoc networks, with emphasis on peer-to-peer communications. To achieve this goal, we propose a randomized distributed algorithm for data replication. Furthermore, a probabilistic approach is...
 
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Found in: Proceedings of the 46th Annual Design Automation Conference (DAC '09)
By Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
Issue Date:July 2009
pp. 412-415
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle such conditions accurately at the behavior and register transfer levels, which is ...
     
Enhancing bug hunting using high-level symbolic simulation
Found in: Proceedings of the 19th ACM Great Lakes symposium on VLSI (GLSVLSI '09)
By Ching-Sung Yang, Hong-Zu Chou, I-Hui Lin, Kai-Hui Chang, Sy-Yen Kuo
Issue Date:May 2009
pp. 375-376
The miniaturization of transistors in recent technology nodes requires tremendous back-end tuning and optimizations, making bug fixing at later design stages more expensive. Therefore, it is imperative to find design bugs as early as possible. The first de...
     
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