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Displaying 1-13 out of 13 total
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture
Found in: Distributed Simulation and Real Time Applications, IEEE/ACM International Symposium on
By Shanna-Shaye Forbes, Hiren D. Patel, Edward A. Lee, Hugo A. Andrade
Issue Date:October 2008
pp. 322-325
Most common real-time embedded programming languages provide a means to specify functionality; however, they have few constructs to specify precise timing constraints. LabVIEW is one example of a graphical programming language that supports timing specific...
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in SystemC?
Found in: Microprocessor Test and Verification, International Workshop on
By Hiren D. Patel, Sandeep K. Shukla
Issue Date:December 2006
pp. 68-75
It is common for large designs to have heterogeneous components interacting with each other. These components often follow a particular model of computation such as controllers modeled using state machines, signal processing filters modeled as data flow an...
Automated Extraction of Structural Information from SystemC-based IP for Validation
Found in: Microprocessor Test and Verification, International Workshop on
By David Berner, Hiren D. Patel, Deepak A. Mathaikutty, Sandeep K. Shukla
Issue Date:November 2005
pp. 99-104
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large percentage of the overall design time. In efforts to alleviate this problem, w...
Towards a Heterogeneous Simulation Kernel for System Level Models: A SystemC Kernel for Synchronous Data Flow Models
Found in: VLSI, IEEE Computer Society Annual Symposium on
By Hiren D. Patel, Sandeep K. Shukla
Issue Date:February 2004
pp. 241
As SystemC gains popularity as a modeling language of choice for system-on-chip (SOC) designs, heterogeneous modeling in SystemC and efficient simulation become increasingly important. However, in the current reference implementation, all SystemC models ar...
ORTAP: An Offset-based response time analysis for a pipelined communication resource model
Found in: 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)
By Hany Kashif,Sina Gholamian,Rodolfo Pellizzoni,Hiren D. Patel,Sebastian Fischmeister
Issue Date:April 2013
pp. 247-258
This work addresses the challenge of computing worst-case response times of hard real-time applications deployed on multiprocessor systems. In particular, the worst-case response time analysis (WCRTA) focuses on the communication between distributed tasks ...
Extending Force-Directed Scheduling with Explicit Parallel and Timed Constructs for High-Level Synthesis
Found in: Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
By Rohit Sinha, Hiren D. Patel
Issue Date:May 2011
pp. 214-217
This work extends force-directed scheduling (FDS) to support specification constructs that express parallelism and timing behaviours. We select the FDS algorithm because it maximizes the amount of resource sharing, and it naturally supports constructs for ...
Towards a Multi-MoC Hardware/Software Co-design Framework Using Abstract State Machines
Found in: Microprocessor Test and Verification, International Workshop on
By Nathan Buchanan, Hiren D. Patel
Issue Date:December 2010
pp. 53-58
This work presents a way to express Concurrent Action Oriented Specification (CAOS) designs using the Abstract State Machine (ASM) formalism. Specifically, we provide the syntax, and scheduling semantics for CAOS in ASMs. This forms an essential piece of o...
Deploying Hard Real-Time Control Software on Chip-Multiprocessors
Found in: Real-Time Computing Systems and Applications, International Workshop on
By Dai N. Bui, Hiren D. Patel, Edward A. Lee
Issue Date:August 2010
pp. 283-292
Deploying real-time control systems software on multiprocessors requires distributing tasks on multiple processing nodes and coordinating their executions using a protocol. One such protocol is the discrete-event (DE) model of computation. In this paper, w...
Accelerating SystemC simulations using GPUs
Found in: 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)
By Mahesh Nanjundappa,Anirudh Kaushik,Hiren D. Patel,Sandeep K. Shukla
Issue Date:November 2012
pp. 132-139
Recent developments in graphics processing unit (GPU) technology has invigorated an interest in using GPUs for accelerating the simulation of SystemC models. SystemC is extensively used for design space exploration, and early performance analysis of hardwa...
An authorization scheme for version control systems
Found in: Proceedings of the 16th ACM symposium on Access control models and technologies (SACMAT '11)
By Hiren D. Patel, Mahesh V. Tripunitara, Sitaram Chamarty
Issue Date:June 2011
pp. 123-132
We present gitolite, an authorization scheme for Version Control Systems (VCSes). We have implemented it for the Git VCS. A VCS enables versioning, distributed collaboration and several other features, and is an important context for authorization and acce...
Predictable programming on a precision timed architecture
Found in: Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems (CASES '08)
By Ben Lickly, Edward A. Lee, Hiren D. Patel, Isaac Liu, Stephen A. Edwards, Sungjun Kim
Issue Date:October 2008
pp. 79-79
In a hard real-time embedded system, the time at which a result is computed is as important as the result itself. Modern processors go to extreme lengths to ensure their function is predictable, but have abandoned predictable timing in favor of average-cas...
Model-driven validation of SystemC designs
Found in: Proceedings of the 44th annual conference on Design automation (DAC '07)
By Hiren D. Patel, Sandeep K. Shukla
Issue Date:June 2007
pp. 29-34
Functional test generation for dynamic validation of current system level designs is a challenging task. Manual test writing or automated random test generation techniques are often used for such validation practices. However, directing tests to particular...
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL
Found in: Proceedings of the conference on Design, automation and test in Europe (DATE '07)
By Hiren D. Patel, Sandeep K. Shukla
Issue Date:April 2007
pp. 279-284
The growing SystemC community for system level design exploration is a result of SystemC's capability of modeling at RTL and above RTL abstraction levels. However, managing shared state concurrency using multi-threading in large SystemC models is error pro...