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High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional Parity
Found in: IEEE Computer Architecture Letters
By Xun Jian,John Sartori,Henry Duwe,Rakesh Kumar
Issue Date:July 2013
pp. 39-42
It is well-known that a significant fraction of server power is consumed in memory; this is especially the case for servers with chipkill correct memories. We propose a new chipkill correct memory organization that decouples correction of errors due to loc...
 
Low-power, low-storage-overhead chipkill correct via multi-line error correction
Found in: Proceedings of SC13: International Conference for High Performance Computing, Networking, Storage and Analysis (SC '13)
By Henry Duwe, Rakesh Kumar, Vilas Sridharan, Xun Jian, John Sartori
Issue Date:November 2013
pp. 1-12
Due to their large memory capacities, many modern servers require chipkill correct, an advanced type of memory error detection and correction, to meet their reliability requirements. However, existing chipkill-correct solutions incur high power or storage ...
     
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