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Displaying 1-50 out of 56 total
A General Approach for Analytical Modeling of Irregular NoCs
Found in: Parallel and Distributed Processing with Applications, International Symposium on
By Reza Moraveji, Paria Moinzadeh, Hamid Sarbazi-Azad
Issue Date:December 2008
pp. 327-334
So far, many analytical models have been proposed in the literature to evaluate the performance of networks with different topologies such as hypercube,torus, mesh, hypermesh, Cartesian product networks, star graph, and k-ary n-cube; however, to the best o...
 
Broadcast Algorithms on OTIS-Cubes
Found in: Parallel and Distributed Processing with Applications, International Symposium on
By Hamid Ebrahimi-Kahaki, Hamid Sarbazi-Azad
Issue Date:December 2008
pp. 637-642
OTIS-based architectures appear to have the potential to be an interesting option for future generations of multiprocessing systems. In this paper, we propose a new adaptive unicast routing algorithm and four software-based (unicast-based) broadcast algori...
 
Fault Detection Enhancement in Cache Memories Using a High Performance Placement Algorithm
Found in: On-Line Testing Symposium, IEEE International
By Hamid R. Zarandi, Seyed Ghassem Miremadi, Hamid Sarbazi-Azad
Issue Date:July 2004
pp. 101
Data integrity of words coming out of the caches needs to be checked to assure their correctness. This paper proposes a cache placement scheme, which provides high performance as well as high fault detection coverage. In this scheme, the cache space is div...
 
Resource Placement in the Edge Product of Graphs
Found in: Advanced Information Networking and Applications, International Conference on
By Paria Moinzadeh, Hamid Sarbazi-Azad
Issue Date:March 2008
pp. 212-218
In a large system, it is neither economical nor efficient to equip each node with a copy of the resource, and it is desirable to distribute the copies of the resource so that certain performance measure is obtained. In this paper we consider the problem of...
 
Multispanning Tree Zone-Ordered Label-Based Routing Algorithms for Irregular Networks
Found in: IEEE Transactions on Parallel and Distributed Systems
By Reza Moraveji, Parya Moinzadeh, Hamid Sarbazi-Azad, Albert Y. Zomaya
Issue Date:May 2011
pp. 817-832
In this paper, a diverse range of routing algorithms is classified into a new family of routings called zone-ordered label-based routing algorithms. The proposed classification is based on three common steps (factors) for generating such routings, namely, ...
 
Empirical Performance Evaluation of Stretched Hypercubes
Found in: Advanced Information Networking and Applications Workshops, International Conference on
By Sina Meraji, Hamid Sarbazi-Azad
Issue Date:March 2008
pp. 75-79
Stretched hypercube has recently been introduced as an attractive alternative to the well-known hypercube. Previous research on this network topology has mainly focused on topological properties and VLSI aspects of this network. In this paper, we propose s...
 
Mathematical performance analysis of product networks
Found in: Parallel and Distributed Systems, International Conference on
By Reza Moraveji, Hamid Sarbazi-Azad
Issue Date:December 2007
pp. 1-8
In this paper, we propose the first comprehensive mathematical performance model for product networks where fully adaptive routing is applied. Besides the generality of this model which makes it suitable to be used for any product graph, our analysis shows...
 
The Effect of Virtual Channel Organization on the Performance of Interconnection Networks
Found in: Parallel and Distributed Processing Symposium, International
By Mostafa Rezazad, Hamid Sarbazi-azad
Issue Date:April 2005
pp. 264a
Most of previous studies have assessed the performance issues for regular buffer and virtual channel organiza-tions and have not considered overall buffer size constraint. In this paper, the performance of mesh-based interconnection networks (mesh, torus a...
 
Detecting Threats in Star Graphs
Found in: IEEE Transactions on Parallel and Distributed Systems
By Navid Imani, Hamid Sarbazi-Azad, Albert Y. Zomaya, Parya Moinzadeh
Issue Date:April 2009
pp. 474-483
In this paper, we consider the problem of searching a network for intruders. We propose a strategy for capturing the intruder in the popular interconnection topology, the star network. According to the proposed strategy, a team of collaborative software ag...
 
Efficient VLSI Layout of Edge Product Networks
Found in: Electronic Design, Test and Applications, IEEE International Workshop on
By Saeedeh Bakhshi, Hamid Sarbazi-Azad
Issue Date:January 2008
pp. 555-560
The interconnection network between the processor cores in multiprocessors on chip has a crucial impact on the performance. Efficient VLSI layout area of such networks can result in lower costs and better performance. Layouts with more compact area can lea...
 
Analytical Modeling of Wormhole-Routed k-Ary n-Cubes in the Presence of Hot-Spot Traffic
Found in: IEEE Transactions on Computers
By Hamid Sarbazi-Azad, Mohamed Ould-Khaoua, Lewis M. Mackenzie
Issue Date:July 2001
pp. 623-634
<p><b>Abstract</b>—Several analytical models of fully adaptive routing have recently been proposed for wormhole-routed <it>k</it>-ary <it>n</it>-cubes under the uniform traffic pattern. However, there has been hard...
 
An Analytical Model of Adaptive Wormhole Routing in Hypercubes in the Presence of Hot Spot Traffic
Found in: IEEE Transactions on Parallel and Distributed Systems
By Mohamed Ould-Khaoua, Hamid Sarbazi-Azad
Issue Date:March 2001
pp. 283-292
<p><b>Abstract</b>—Analytical models of fully adaptive routing for common wormhole-routed networks (e.g., hypercubes) under the uniform traffic pattern have recently been reported in the literature. However, many studies have revealed tha...
 
A Path-Based Broadcast Algorithm for Wormhole Hypercubes
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Azade Nazi, Hamid Sarbazi Azad
Issue Date:December 2009
pp. 586-591
When implementing some applications in multi-computer systems, broadcast operation is a necessity for efficient communication. Several broadcast algorithms have been proposed in the literature for hypercube networks. In this paper, we evaluate the performa...
 
Computing Accurate Performance Bounds for Best Effort Networks-on-Chip
Found in: IEEE Transactions on Computers
By Dara Rahmati,Srinivasan Murali,Luca Benini,Federico Angiolini,Giovanni De Micheli,Hamid Sarbazi-Azad
Issue Date:March 2013
pp. 452-467
Real-time (RT) communication support is a critical requirement for many complex embedded applications which are currently targeted to Network-on-chip (NoC) platforms. In this paper, we present novel methods to efficiently calculate worst case bandwidth and...
 
Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip
Found in: 2013 21st Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)
By Nasibeh Teimouri,Mehdi Modarressi,Hamid Sarbazi-Azad
Issue Date:February 2013
pp. 509-513
In this paper, we propose a hybrid packet-circuit switching for networks-on-chip to benefit from the advantages of both switching mechanisms. Integrating circuit and packet switching into a single NoC is achieved by partitioning the link bandwidth and rout...
 
Reconfigurable Cluster-Based Networks-on-Chip for Application-Specific MPSoCs
Found in: 2012 IEEE 23rd International Conference on Application-specific Systems, Architectures and Processors (ASAP)
By Mehdi Modarressi,Hamid Sarbazi-Azad
Issue Date:July 2012
pp. 153-156
In this paper, we propose a reconfigurable NoC in which a customized topology for a given application can be implemented. In this NoC, the nodes are grouped into some clusters interconnected by a reconfigurable communication infrastructure. The nodes insid...
 
A Distributed Task Migration Scheme for Mesh-Based Chip-Multiprocessors
Found in: Parallel and Distributed Computing Applications and Technologies, International Conference on
By Hossein Yaghoubi,Mehdi Modarresi,Hamid Sarbazi-Azad
Issue Date:October 2011
pp. 24-29
A task migration scheme for homogeneous chip multiprocessors (CMP) is presented in this paper. The proposed migration mechanism focuses on the communication sub-system and aims to reduce the total power consumption and latency of the network-on-chip (NoC)....
 
Application Specific Router Architectures for NoCs: An Efficiency and Power Consumption Analysis
Found in: Hardware and Software Implementation and Control of Distributed MEMS, Workshop on
By Noushin Najjari, Hamid Sarbazi-Azad
Issue Date:June 2010
pp. 86-91
Networks on Chip have been proposed as a solution to mitigate complex on-chip communication problems. NoCs are composed of intellectual properties which are interconnected by on-chip switching fabrics. A step in the design process of NoCs is hardware virtu...
 
The Edge Product of Networks
Found in: Parallel and Distributed Computing Applications and Technologies, International Conference on
By Ali Jalali, Hamid Sarbazi-Azad
Issue Date:December 2007
pp. 371-375
Product (EGP) is proposed by replacing each edge in the multiplicand graph by a copy of the multiplier graph via two candidate nodes. The edge product, unlike other products already proposed, results in a graph whose number of edges is numerical product of...
 
Parallel 3-Dimensional DCT Computation on k-Ary n-Cubes
Found in: High Performance Computing and Grid in Asia Pacific Region, International Conference on
By Mehdi Modarressi, Hamid Sarbazi-Azad
Issue Date:December 2005
pp. 91-97
The three dimensional discrete cosine transform (3D DCT) has been widely used in many applications such as video compression. On the other hand, the kary n-cube is one of the most popular interconnection networks used in many recent multicomputers. As dire...
 
An Empirical Comparison of OTIS-Mesh and OTIS-Hypercube Multicomputer Systems under Deterministic Routing
Found in: Parallel and Distributed Processing Symposium, International
By Hashem Hashemi Najaf-abadi, Hamid Sarbazi-azad
Issue Date:April 2005
pp. 262a
In optoelectronic OTIS architectures, electrical and optical interconnects are used for local and global communication, respectively. Interesting instances of the OTIS architecture are the OTIS-hypercube and OTIS-mesh. This paper conducts a performance eva...
 
A Reliable 3D MLC PCM Architecture with Resistance Drift Predictor
Found in: 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
By Majid Jalili,Mohammad Arjomand,Hamid Sarbazi Azad
Issue Date:June 2014
pp. 204-215
In this paper, we study the problem of resistance drift in an MLC Phase Change Memory (PCM) and propose a solution to circumvent its thermally-affected accelerated rate in 3D CMPs. Our scheme is based on the observation that instead of alleviating the prob...
 
Exploration of Temperature Constraints for Thermal Aware Mapping of 3D Networks on Chip
Found in: Parallel, Distributed, and Network-Based Processing, Euromicro Conference on
By Parisa Khadem Hamedani,Shaahin Hessabi,Hamid Sarbazi-Azad,Natalie Enright Jerger
Issue Date:February 2012
pp. 499-506
This paper proposes three ILP-based static thermal-aware mapping algorithms for 3D Networks on Chip (NoC) to explore the thermal constraints and their effects on temperature and performance. Through complexity analysis, we show that the first algorithm, an...
 
Providing mobile Internet service using MOnetary Wireless NETworking (MOWNET)
Found in: Local Computer Networks, Annual IEEE Conference on
By Abbas Nayebi,Amin Dahesh,Hamid Sarbazi-Azad
Issue Date:October 2011
pp. 734-737
A MOWNET is a wireless network that uses financial incentives to make different agents collaborate. In this paper, architecture is proposed to use MOWNETs for Internet service providing. Limited shared bandwidth is a substantial problem in wireless Interne...
 
A morphable phase change memory architecture considering frequent zero values
Found in: Computer Design, International Conference on
By Mohammad Arjomand,Amin Jadidi,Ali Shafiee,Hamid Sarbazi-Azad
Issue Date:October 2011
pp. 373-380
Phase Change Memory (PCM) is emerging as a high-dense and power-efficient choice for future main memory systems. While PCM cell size is marching towards minimum achievable feature size, recent prototypes effectively improve device scalability by storing mu...
 
A reconfigurable fault-tolerant routing algorithm to optimize the network-on-chip performance and latency in presence of intermittent and permanent faults
Found in: Computer Design, International Conference on
By Reyhaneh Jabbarvand Behrouz,Mehdi Modarressi,Hamid Sarbazi Azad
Issue Date:October 2011
pp. 433-434
As the semiconductor industry advances to the deep sub-micron and nano technology points, the on-chip components are more prone to the defects during manufacturing and faults during system operation. Consequently, fault tolerant techniques are essential to...
 
A Load-Balanced Routing Scheme for NoC-Based Systems-on-Chip
Found in: Hardware and Software Implementation and Control of Distributed MEMS, Workshop on
By Mahdi Asefi Yazdi, Mehdi Modarressi, Hamid Sarbazi-Azad
Issue Date:June 2010
pp. 72-77
Future Multiprocessor Systems-on-Chip (SoCs) will consist of various digital and analog components, such as processing cores, storage elements, customized IP-cores, analog peripheral devices, and many other items of MEMS. Network-on-chip is a promising mec...
 
Voltage-Frequency Planning for Thermal-Aware, Low-Power Design of Regular 3-D NoCs
Found in: VLSI Design, International Conference on
By Mohammad Arjomand, Hamid Sarbazi-Azad
Issue Date:January 2010
pp. 57-62
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. For power reduction, multiple voltage-frequency levels are successfully appli...
 
Performance and power efficient on-chip communication using adaptive virtual point-to-point connections
Found in: Networks-on-Chip, International Symposium on
By Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol
Issue Date:May 2009
pp. 203-212
In this paper, we propose a packet-switched network-on-chip (NoC) architecture which can provide a number of low-power, low-latency virtual point-to-point connections for communication flows. The work aims to improve the power and performance metrics of pa...
 
Routing, data gathering, and neighbor discovery in delay-tolerant wireless sensor networks
Found in: Parallel and Distributed Processing Symposium, International
By Abbas Nayebi,Hamid Sarbazi-Azad,Gunnar Karlsson
Issue Date:May 2009
pp. 1-6
This paper investigates a class of mobile wireless sensor networks that are not connected most of the times. The characteristics of these networks is inherited from both delay tolerate networks (DTN) and wireless sensor networks. First, delay-tolerant wire...
 
A General Methodology for Routing in Irregular Networks
Found in: Parallel, Distributed, and Network-Based Processing, Euromicro Conference on
By Reza Moraveji, Hamid Sarbazi-Azad, Albert Y. Zomaya
Issue Date:February 2009
pp. 155-160
Irregular networks provide more scalability and better cost-performance for network-based parallel computing systems. There has been much work done on developing routing algorithms for this class of networks. In this paper, a general methodology for genera...
 
Performance Evaluation of Broadcast Algorithms in All-Port 2D Mesh Networks
Found in: Parallel and Distributed Processing with Applications, International Symposium on
By Mitra Khorramabadi, Hamid Sarbazi-Azad
Issue Date:December 2008
pp. 643-648
Broadcast is among the most primitive collective communication operations of any interconnection network. Broadcast algorithms for the mesh topology have been widely reported in the literature. However, most existing algorithms have been studied in one-por...
 
Mesh Connected Crossbars: A Novel NoC Topology with Scalable Communication Bandwidth
Found in: Parallel and Distributed Processing with Applications, International Symposium on
By Arash Tavakkol, Reza Moraveji, Hamid Sarbazi-Azad
Issue Date:December 2008
pp. 319-326
Recent studies have revealed that on-chip interconnects neither is wire plentiful nor is bandwidth cheap. Based on the results of these studies, in physical design of Multiprocessor System-on-Chip (MPSoCs), both the wiring density constraint and routing of...
 
The Shuffle-Exchange Mesh Topology for 3D NoCs
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Akbar Sharifi, Reza Sabbaghi-Nadooshan, Hamid Sarbazi-Azad
Issue Date:May 2008
pp. 275-280
Nowadays networks-on-chip are emerging as a hot topic in IC designs with high integration. In addition to popular mesh and torus topologies, other structures can also be considered especially in 3D VLSI design. The shuffle-exchange topology is one of the p...
 
Resource Placement in Cube-Connected Cycles
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Paria Moinzadeh, Hamid Sarbazi-Azad, Nasser Yazdani
Issue Date:May 2008
pp. 83-89
In large systems, economical and efficiency concerns restrict the allocation of each resource to every node in the network. Therefore, it is desirable to distribute copies of resource in order to share them and achieve a certain performance measure. In thi...
 
One-to-one and One-to-many node-disjoint Routing Algorithms for WK-Recursive networks
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Saeedeh Bakhshi, Hamid Sarbazi-Azad
Issue Date:May 2008
pp. 227-232
Recently, routing with disjoint paths has received much attention to provide more performance and fault tolerance. On the other hand, WK-recursive mesh network has been studied extensively due to its favorable properties such as high degree of stability an...
 
A novel high-performance and low-power mesh-based NoC
Found in: Parallel and Distributed Processing Symposium, International
By Reza Sabbaghi-Nadooshan, Mehdi Modarressi, Hamid Sarbazi-Azad
Issue Date:April 2008
pp. 1-7
In this paper, a 2D shuffle-exchange based mesh topology, or 2D SEM (Shuffle-exchange Mesh) for short, is presented for network-on-chips. The proposed two-dimensional topology applies the conventional well-known shuffle-exchange structure in each row and e...
 
Virtual Point-to-Point Links in Packet-Switched NoCs
Found in: VLSI, IEEE Computer Society Annual Symposium on
By Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol
Issue Date:April 2008
pp. 433-436
A method to setup virtual point-to-point links between the cores of a packet-switched network-on-chip is presented in this paper which aims at reducing the NoC power consumption and delay. The router architecture proposed in this paper provides packet-swit...
 
Accelerating 3-D capacitance extraction in deep sub-micron VLSI design using vector/parallel computing
Found in: Parallel and Distributed Systems, International Conference on
By Nima Shahbazi, Hamid Sarbazi-Azad
Issue Date:December 2007
pp. 1-8
The widespread application of deep sub-micron and multilayer routing techniques makes the interconnection parasitic influence become the main factor to limit the performance of VLSI circuits. Therefore, fast and accurate 3D capacitance extraction is essent...
 
The Stretched-Hypercube: A VLSI Efficient Network Topology
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Pooya Shareghi, Hamid Sarbazi-Azad
Issue Date:December 2005
pp. 462-467
In this paper, we introduce a new class of interconnection networks for multiprocessor systems which we refer to as Stretched-Hypercubes, or shortly the Stretched-Cube networks. These networks are obtained by replacing an edge of the well-known hypercube n...
 
Topological Properties of Necklace Networks
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Pooya Shareghi, Hamid Sarbazi-Azad
Issue Date:December 2005
pp. 40-45
We study a class of interconnection networks for multiprocessors, called the Necklace-G network that is based on the base graph G by attaching an array of processors to each two adjacent nodes of G. One of the interesting features of the proposed topology ...
 
Performance Comparison of Adaptive Routing Algorithms in the Star Network
Found in: High Performance Computing and Grid in Asia Pacific Region, International Conference on
By Abbas Eslami Kiasari, Hamid Sarbazi-Azad, Mustafa S. Rezazad
Issue Date:December 2005
pp. 257-264
The star graph was introduced as an attractive alternative to the well-know hypercube and its properties have been well studied in the past. Most of these studies have focused on topological properties and algorithmic aspects of this network. In this paper...
 
Performance Evaluation of Fully Adaptive Routing Under Different Workloads and Constant Node Buffer Size
Found in: Parallel and Distributed Systems, International Conference on
By Mostafa Rezazad, Hamid Sarbazi Azad
Issue Date:July 2005
pp. 510-514
<p>In this paper, the performance of some popular direct interconnection networks, namely the mesh, torus and hypercube, are studied with adaptive wormhole routing for different traffic patterns. We investigate the effect of the number of virtual cha...
 
Parallel Polynomial Root Extraction on A Ring of Processors
Found in: Parallel and Distributed Processing Symposium, International
By Hamid Sarbazi-Azad
Issue Date:April 2005
pp. 276a
In this paper, a parallel algorithm for computing the roots of a given polynomial of degree n on a ring of processors is proposed. The algorithm implements Durand-Kerner's method and consists of two phases: initialization, and iteration. In the initializat...
 
On Some Combinatorial Properties of Meshes
Found in: Parallel Architectures, Algorithms, and Networks, International Symposium on
By Hamid Sarbazi-Azad
Issue Date:May 2004
pp. 117
The mesh structure has been used as the underlying topology for many practical multicomputers, and has been extensively studied in the past. In this paper, we investigate some topological properties of meshes. In particular, we study the problem of finding...
 
A Performance Model of Adaptive Routing in k-Ary n-Cubes with Matrix-Transpose Traffic
Found in: Parallel Processing, International Conference on
By Hamid Sarbazi-Azad, Lewis M. Mackenzie, Mohamed Ould-Khaoua
Issue Date:August 2000
pp. 345
Several analytical models of fully adaptive routing in wormhole-routed k-ary n-cubes under the uniform traffic pattern have recently been proposed in the literature. Although the uniform reference model has been widely used in the past, it is not always tr...
 
Modeling of Pipelined Circuit Switching in Multicomputer Networks
Found in: Modeling, Analysis, and Simulation of Computer Systems, International Symposium on
By Geyong Min, Mohamed Ould-Khaoua, Hamid Sarbazi-Azad
Issue Date:September 2000
pp. 299
Several recent studies have revealed that pipelined circuit switching (PCS) can provide superior performance characteristics over wormhole routing. This paper proposes an original analytical model of PCS in k-ary n-cube networks augmented with virtual chan...
 
An Adaptive Software-Based Deadlock Recovery Technique
Found in: Advanced Information Networking and Applications Workshops, International Conference on
By Mohammad Mirza-Aghatabar, Arash Tavakkol, Hamid Sarbazi-Azad, Abbas Nayebi
Issue Date:March 2008
pp. 514-519
Deadlock management has a direct effect on making a reliable connection between processing nodes in parallel computers. Networks using wormhole switching are the most vulnerable networks to deadlock occurrence due to chained blocking nature of this switchi...
 
Analysis of k-Neigh Topology Control Protocol for Wireless Networks
Found in: Advanced Information Networking and Applications Workshops, International Conference on
By Abbas Nayebi, Hamid Sarbazi-Azad, Kasra Alishahi
Issue Date:March 2008
pp. 904-909
k-Neigh is a basic neighbor-based topology control protocol based on the construction of k-neighbor graph as logical communication graph. Although k-Neigh is based on a connectivity theory, several topological aspects of the constructed topology are not ye...
 
Reducing access latency of MLC PCMs through line striping
Found in: 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)
By Morteza Hoseinzadeh,Mohammad Arjomand,Hamid Sarbazi-Azad
Issue Date:June 2014
pp. 277-288
Although phase change memory with multi-bit storage capability (known as MLC PCM) offers a good combination of high bit-density and non-volatility, its performance is severely impacted by the increased read/write latency. Regarding read operation, access l...
   
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