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Displaying 1-9 out of 9 total
POD: A 3D-Integrated Broad-Purpose Acceleration Layer
By Dong Hyuk Woo, Hsien-Hsin S. Lee, Joshua B. Fryman, Allan D. Knies, Marsha Eng
Issue Date:July 2008
To build a future many-core processor, industry must address the challenges of energy consumption and performance scalability. A 3D-integrated broad-purpose accelerator architecture called parallel-on-demand (POD) integrates a specialized SIMD-based die la...
Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out
By Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee
Issue Date:January 2011
<p>As dynamic RAM scaling approaches its physical limit, phase-change memory is the most mature and well-studied option for potential DRAM replacement. However, malicious wear-out attacks can exploit PCM's limited write endurance. To address this, a ...
SAFER: Stuck-At-Fault Error Recovery for Memories
Microarchitecture, IEEE/ACM International Symposium on
By Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee
Issue Date:December 2010
As technology scaling poses a threat to DRAM scaling due to physical limitations such as limited charge, alternative memory technologies including several emerging non-volatile memories are being explored as possible DRAM replacements. One main roadblock f...
Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era
By Dong Hyuk Woo, Hsien-Hsin S. Lee
Issue Date:December 2008
An updated take on Amdahl's analytical model uses modern design constraints to analyze many-core design alternatives. The revised models provide computer architects with a better understanding of many-core design types, enabling them to make more informed ...
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)
IEEE Transactions on Computers
By Dae Hyun Kim,Krit Athikulwongse,Michael B. Healy,Mohammad M. Hossain,Moongon Jung,Ilya Khorosh,Gokul Kumar,Young-Joon Lee,Dean L. Lewis,Tzu-Wei Lin,Chang Liu,Shreepad Panth,Mohit Pathak,Minzhen Ren,Guanhao Shen,Taigon Song,Dong Hyuk Woo,Xin Zhao,Joungho Kim,Ho Choi,Gabriel H. Loh,Hsien-Hsin Lee,Sung Kyu Lim
Issue Date:October 2013
This paper describes the architecture, design, analysis, and simulation and measurement results of the 3D-MAPS (3D massively parallel processor with stacked memory) chip built with a 1.5V, 130nm process technology and a two-tier 3D stacking technology usin...
SIMD divergence optimization through intra-warp compaction
Found in: Proceedings of the 40th Annual International Symposium on Computer Architecture (ISCA '13)
By Anahita Shayesteh, Aniruddha S. Vaidya, Dong Hyuk Woo, Mani Azimi, Roy Saharoy
Issue Date:June 2013
SIMD execution units in GPUs are increasingly used for high performance and energy efficient acceleration of general purpose applications. However, SIMD control flow divergence effects can result in reduced execution efficiency in a class of GPGPU applicat...
Acceleration of bulk memory operations in a heterogeneous multicore architecture
Found in: Proceedings of the 21st international conference on Parallel architectures and compilation techniques (PACT '12)
By Dainis Boumber, Dong Hyuk Woo, JongHyuk Lee, Kyeong-An Kwon, Weidong Shi, Xiaonan Tian, Yonghong Yan, Ziyi Liu
Issue Date:September 2012
In this paper, we present a novel approach of using the integrated GPU to accelerate conventional operations that are normally performed by the CPUs, the bulk memory operations, such as memcpy or memset. Offloading the bulk memory operations to the GPU has...
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping
Found in: Proceedings of the 37th annual international symposium on Computer architecture (ISCA '10)
By Dong Hyuk Woo, Hsien-Hsin S. Lee, Nak Hee Seong
Issue Date:June 2010
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and has a faster read latency and potentially higher storage density. The main r...
COMPASS: a programmable data prefetcher using idle GPU shaders
Found in: Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems (ASPLOS '10)
By Dong Hyuk Woo, Hsien-Hsin S. Lee
Issue Date:March 2010
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores are mainly used for accelerating graphics applications or enabling low-cost s...
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