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Displaying 1-5 out of 5 total
IBM zEC12: The Third-Generation High-Frequency Mainframe Microprocessor
Found in: IEEE Micro
By C. Kevin Shum,Fadi Busaba,Christian Jacobi
Issue Date:March 2013
pp. 38-47
The zEnterprise EC12 is the latest generation of IBM's System z Enterprise Class mainframe servers. The microprocessor operates at an ultra-high frequency of 5.5 GHz and incorporates many pipeline-optimization and instruction-processing techniques. It also...
Transactional Memory Architecture and Implementation for IBM System Z
Found in: 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
By Christian Jacobi,Timothy Slegel,Dan Greiner
Issue Date:December 2012
pp. 25-36
We present the introduction of transactional memory into the next generation IBM System z CPU. We first describe the instruction-set architecture features, including requirements for enterprise-class software RAS. We then describe the implementation in the...
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
Found in: Computer Arithmetic, IEEE Symposium on
By Silvia M. Mueller, Christian Jacobi, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong
Issue Date:June 2005
pp. 59-67
<p>The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and integer operations and 2-way SIMD double precision operations. The design r...
Automatic Formal Verification of Fused-Multiply-Add FPUs
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Christian Jacobi, Kai Weber, Viresh Paruthi, Jason Baumgartner
Issue Date:March 2005
pp. 1298-1303
In this paper we describe a fully-automated methodology for formal verification of fused-multiply-add floating point units (FPUs). Our methodology verifies an implementation FPU against a simple reference model derived from the processor's architectural sp...
Using threads in interactive systems: a case study
Found in: Proceedings of the fourteenth ACM symposium on Operating systems principles (SOSP '93)
By Brent Welch, Carl Hauser, Christian Jacobi, Mark Weiser, Marvin Theimer
Issue Date:December 1993
pp. 180-189
Shared memory is an effective and efficient paradigm for interprocess communication. We are concerned with software that makes use of shared memory in a single site system and its extension to a multimachine environment. Here we describe the design of a di...