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Displaying 1-6 out of 6 total
Mechanisms and Evaluation of Cross-Layer Fault-Tolerance for Supercomputing
Found in: 2012 41st International Conference on Parallel Processing (ICPP)
By Chen-Han Ho,Marc de Kruijf,Karthikeyan Sankaralingam,Barry Rountree,Martin Schulz,Bronis R. de Supinski
Issue Date:September 2012
pp. 510-519
Reliability is emerging as an important constraint for future microprocessors. Cooperative hardware and software approaches for error tolerance can solve this hardware reliability challenge. Cross-layer fault tolerance frameworks expose hardware failures t...
Dynamically Specialized Datapaths for energy efficient computing
Found in: High-Performance Computer Architecture, International Symposium on
By Venkatraman Govindaraju, Chen-Han Ho, Karthikeyan Sankaralingam
Issue Date:February 2011
pp. 503-514
Due to limits in technology scaling, energy efficiency of logic devices is decreasing in successive generations. To provide continued performance improvements without increasing power, regardless of the sequential or parallel nature of the application, mic...
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing
Found in: IEEE Micro
By Venkatraman Govindaraju,Chen-Han Ho,Tony Nowatzki,Jatin Chhugani,Nadathur Satish,Karthikeyan Sankaralingam,Changkyu Kim
Issue Date:September 2012
pp. 38-51
The DySER (Dynamically Specializing Execution Resources) architecture supports both functionality specialization and parallelism specialization. By dynamically specializing frequently executing regions and applying parallelism mechanisms, DySER provides ef...
Design, integration and implementation of the DySER hardware accelerator into OpenSPARC
Found in: High-Performance Computer Architecture, International Symposium on
By Jesse Benson,Ryan Cofell,Chris Frericks,Chen-Han Ho,Venkatraman Govindaraju,Tony Nowatzki,Karthikeyan Sankaralingam
Issue Date:February 2012
pp. 1-12
Accelerators and specialization in various forms are emerging as a way to increase processor performance. Examples include Navigo, Conservation-Cores, BERET, and DySER. While each of these employ different primitives and principles to achieve specializatio...
Exploring the Interaction Between Device Lifetime Reliability and Security Vulnerabilities
Found in: IEEE Computer Architecture Letters
By Chen-Han Ho,Garret Staus,Aaron Ullmer,Karu Sakaralingam
Issue Date:July 2011
pp. 37-40
As technology scales, device reliability is becoming a fundamental problem. Even though manufacture test can guarantee product quality, due to various types of wearout and failure modes, permanent faults appear in the filed is becoming an increasingly impo...
Sampling + DMR: practical and low-overhead permanent fault detection
Found in: Proceeding of the 38th annual international symposium on Computer architecture (ISCA '11)
By Chen-Han Ho, Karthikeyan Sankaralingam, Marc de Kruijf, Matthew D. Sinclair, Shuou Nomura, Venkatraman Govindaraju
Issue Date:June 2011
pp. 201-212
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting and isolating faulty cores, but the required fault detection coverage becomes ef...