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Displaying 1-4 out of 4 total
Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example
Found in: 2011 Design, Automation & Test in Europe
By H Hashempour,J Dohmen,Bratislav Tasić,B Kruseman,C Hora,M van Beurden, Yizi Xing
Issue Date:March 2011
pp. 1-6
We present an application of Defect Oriented Testing (DOT 1 ) to an industrial mixed signal device to reduce test time and maintain quality. The device is an automotive IC product with stringent quality requirements and a mature test program that is alread...
Diagnosis of Full Open Defects in Interconnecting Lines
Found in: VLSI Test Symposium, IEEE
By R. Rodriguez-Montanes, D. Arumi, J. Figueras, S. Einchenberger, C. Hora, B. Kruseman, M. Lousberg, A.K. Majhi
Issue Date:May 2007
pp. 158-166
A proposal for enhancing the diagnosis of full open defects in interconnecting lines of CMOS circuits is presented. The defective line is first classified as fully opened by means of a logic-based diagnosis tool (Faloc). The proposal is based on the divisi...
A novel stuck-at based method for transistor stuck-open fault diagnosis
Found in: Test Conference, International
By Xinyue Fan, W. Moore, C. Hora, G. Gronthoud
Issue Date:November 2005
pp. 9 pp.-386
While most of the fault diagnosis tools are based on gate level fault models, for instance the stuck-at model, many faults are actually at the transistor level. The stuck-open fault is one example. In this paper we introduce a method which extends the use ...
Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages
Found in: VLSI Test Symposium, IEEE
By D. Arumi, R. Rodriguez-Montanes, J. Figueras, S. Eichenberger, C. Hora, B. Kruseman, M. Lousberg, A.K. Majhi
Issue Date:May 2007
pp. 145-150
Improvement of diagnosis methodologies is a key factor for fast failure analysis and yield improvement. As bridging defects are a common defect type in CMOS circuits, diagnosing this class of defect becomes relevant for present and future technologies. Bri...