SC 2 : A statistical compression cache scheme
2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)
By Angelos Arelakis,Per Stenstrom
Issue Date:June 2014
Low utilization of on-chip cache capacity limits performance and wastes energy because of the long latency, limited bandwidth, and energy consumption associated with off-chip memory accesses. Value replication is an important source of low capacity utiliza...