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Displaying 1-50 out of 120 total
Guest Editors' Introduction: Security and Trust in Embedded-Systems Design
Found in: IEEE Design and Test of Computers
By Patrick Schaumont, Anand Raghunathan
Issue Date:November 2007
pp. 518-520
Security and trust have become important considerations in the design of virtually all modern embedded systems. The requirements of secure and trusted design are unique: Secure design emphasizes information leakage (or prevention thereof) and dependable be...
 
High-Level Synthesis with SIMD Units
Found in: VLSI Design, International Conference on
By Vijay Raghunathan, Mani B. Srivastava, Milos D. Ercegovac, Anand Raghunathan
Issue Date:January 2002
pp. 407
This paper presents novel techniques to integrate the use of Single Instruction Multiple Data (SIMD) functional units in a high-level synthesis (HLS) design methodology. SIMD functional units can be configured to operate in one or more SIMD modes, in which...
 
Transient Power Management Through High Level Synthesis
Found in: Computer-Aided Design, International Conference on
By Vijay Raghunathan, Srivaths Ravi, Anand Raghunathan, Ganesh Lakshminarayana
Issue Date:November 2001
pp. 545
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit's power dissipation (e.g., peak power, and power gradient or differential) in addition to its average power consumption. Current transi...
 
Guest Editors' Introduction: Green Buildings
Found in: IEEE Design & Test of Computers
By Yuvraj Agarwal,Anand Raghunathan
Issue Date:August 2012
pp. 5-7
No summary available.
 
Architectural support for safe software execution on embedded processors
Found in: Hardware/software codesign and system synthesis, International conference on
By Niraj K. Jha, Srivaths Ravi, Anand Raghunathan, Divya Arora
Issue Date:October 2006
pp. 106-111
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and more recently, system security. A major portion of known security attacks again...
 
Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors
Found in: VLSI Design, International Conference on
By Nachiketh R. Potlapally, Srivaths Ravi, Anand Raghunathan, Ruby B. Lee, Niraj K. Jha
Issue Date:January 2006
pp. 299-304
<p>Security protocols, such as IPSec and SSL, are being increasingly deployed in the context of networked embedded systems. The resource-constrained nature of embedded systems and, in particular, the modest capabilities of embedded processors make it...
 
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:March 2005
pp. 178-183
Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in
 
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Found in: VLSI Design, International Conference on
By Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan, Srimat T. Chakradhar
Issue Date:January 2005
pp. 579-585
<p>Paper analysis early in the design cycle is critical for the design of low-power systems. With the move to system-level specifications and design methodologies, there has been significant research interest in system-level power estimation. However...
 
Profiling Driven Computation Reuse: An Embedded Software Synthesis Technique for Energy and Performance Optimization
Found in: VLSI Design, International Conference on
By Weidong Wang, Anand Raghunathan, Niraj K. Jha
Issue Date:January 2004
pp. 267
It has been observed that even highly optimized software programs perform
 
Energy-Optimizing Source Code Transformations for OS-driven Embedded Software
Found in: VLSI Design, International Conference on
By Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:January 2004
pp. 261
The increasing software content of battery-powered embedded systems has fueled much interest in techniques for developing energy-efficient embedded software. Source code transformations have previously been considered for application software to reduce its...
 
Tamper Resistance Mechanisms for Secure, Embedded Systems
Found in: VLSI Design, International Conference on
By Srivaths Ravi, Anand Raghunathan, Srimat Chakradhar
Issue Date:January 2004
pp. 605
To secure digital assets, a tasteful integration of a variety of technologies and processes is necessary. Tamper-resistance is being increasingly used as an important piece of a more comprehensive security system. It provides an effective barrier to entry ...
 
Synthesis of Heterogeneous Distributed Architectures for Memory-Intensive Applications
Found in: Computer-Aided Design, International Conference on
By Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:November 2003
pp. 46
Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latencies, etc. The high potential of single-chip distributed logic-memory architectur...
 
A Scalable Software-Based Self-Test Methodology for Programmable Processors
Found in: Design Automation Conference
By Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit Dey
Issue Date:June 2003
pp. 548
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) that contain them. While early work on SBST has proposed several promising idea...
 
Transport Protocol Optimization for Energy Efficient Wireless Embedded Systems
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Davide Bertozzi, Anand Raghunathan, Luca Benini, Srivaths Ravi
Issue Date:March 2003
pp. 10706
For wireless embedded systems, the power consumption in the network interface (radio) plays a dominant role in determining battery life. In this paper, we explore transport protocol optimizations for reducing the energy consumption of wireless LAN interfac...
 
Energy Estimation for Extensible Processors
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:March 2003
pp. 10682
<p>This paper presents an efficient methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are increasingly popular in embedded system design, allow a designer to custo...
 
High-level Synthesis of Multi-process Behavioral Descriptions
Found in: VLSI Design, International Conference on
By Weidong Wang, Niraj K. Jha, Anand Raghunathan, Sujit Dey
Issue Date:January 2003
pp. 467
This paper presents a new high-level synthesis methodology to generate optimized implementations for multi-process behavioral descriptions. The concurrent communicating processes specification paradigm is widely used in digital circuit and system design, a...
 
Securing Wireless Data: System Architecture Challenges
Found in: System Synthesis, International Symposium on
By Anand Raghunathan, Nachiketh Potlapally, Srivaths Ravi
Issue Date:October 2002
pp. 195-200
Security is critical to a wide range of current and future wireless data applications and services. This paper highlights the challenges posed by the need for security during system architecture design for wireless handsets, and provides an overview of eme...
 
Communication Architecture Based Power Management for Battery Efficient System Design
Found in: Design Automation Conference
By Kanishka Lahiri, Anand Raghunathan, Sujit Dey
Issue Date:June 2002
pp. 691
Communication-based power management (CBPM) is a new battery-driven system-level power management methodology in which the system-level communication architecture regulates the execution of various system components, with the aim of improving battery effic...
 
System Design Methodologies for a Wireless Security Processing Platform
Found in: Design Automation Conference
By Srivaths Ravi, Anand Raghunathan, Nachiketh Potlapally, Murugan Sankaradass
Issue Date:June 2002
pp. 777
Security protocols are critical to enabling the growth of a wide range of wireless data services and applications. However, they impose a high computational burden that is mismatched with the modest processing capabilities and battery resources available o...
 
Input Space Adaptive Embedded Software Synthesis
Found in: VLSI Design, International Conference on
By Weidong Wang, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha
Issue Date:January 2002
pp. 711
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is based on the fact that the computational complexities of programs or sub-prog...
 
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
Found in: VLSI Design, International Conference on
By Kanishka Lahiri, Sujit Dey, Anand Raghunathan
Issue Date:January 2001
pp. 29
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system architecture for a specific application or domain, makes it critical for a desi...
 
Efficient Exploration of the SoC Communication Architecture Design Space
Found in: Computer-Aided Design, International Conference on
By Kanishka Lahiri, Anand Raghunathan, Sujit Dey
Issue Date:November 2000
pp. 424
In this paper, we present a methodology and efficient algorithms for the design of high-performance system-on-chip communication architectures. Our methodology automatically and optimally maps the various communications between system components onto a tar...
 
Efficient Power Co-Estimation Techniques for System-on-Chip Design
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
Issue Date:March 2000
pp. 27
We present efficient power estimation techniques for HW/SW System-On-Chip (SOC) designs. Our techniques are based on concurrent and synchronized execution of multiple power estimators that analyze different parts of the SOC (we refer to this as co-estimati...
 
Performance Analysis of Systems with Multi-Channel Communication Architectures
Found in: VLSI Design, International Conference on
By Kanishka Lahiri, Sujit Dey, Anand Raghunathan
Issue Date:January 2000
pp. 530
This paper presents a novel system performance analysis technique to support the design of custom communication architectures for System-on-Chip ICs. Our technique fills a gap in existing techniques for system-level performance analysis, which are either t...
 
Fast Performance Analysis of Bus-Based System-On-Chip Communication Architectures
Found in: Computer-Aided Design, International Conference on
By Kanishka Lahiri, Anand Raghunathan, Sujit Dey
Issue Date:November 1999
pp. 566
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. Our technique fills a gap in existing techniques for system-level performance...
 
Energy-efficient and Secure Sensor Data Transmission Using Encompression
Found in: 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems
By Meng Zhang,Mehran Mozaffari Kermani,Anand Raghunathan,Niraj K. Jha
Issue Date:January 2013
pp. 31-36
Sensor networks are frequently deployed in physically insecure environments and capture sensitive data, making security a paramount challenge. Cryptographic techniques, such as encryption and hashing, are useful in addressing these concerns. However, the u...
 
Emerging Frontiers in Embedded Security
Found in: 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems
By Mehran Mozaffari Kermani,Meng Zhang,Anand Raghunathan,Niraj K. Jha
Issue Date:January 2013
pp. 203-208
Computing platforms are expected to be deeply embedded within physical objects and people, creating an {\em Internet of Things}. These embedded computing platforms will enable a wide spectrum of applications, including implantable and wearable medical devi...
 
Localized Heating for Building Energy Efficiency
Found in: 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems
By Jun Wei Chuah,Chunxiao Li,Niraj K. Jha,Anand Raghunathan
Issue Date:January 2013
pp. 13-18
Commercial and residential buildings account for a large share of any country's energy consumption (e.g., 40% of total energy consumption in the United States). Within buildings, a major portion of the expended energy is used to provide heating and cooling...
 
Automatic generation of software pipelines for heterogeneous parallel systems
Found in: 2012 SC - International Conference for High Performance Computing, Networking, Storage and Analysis
By Jacques A. Pienaar,Srimat Chakradhar,Anand Raghunathan
Issue Date:November 2012
pp. 1-12
Pipelining is a well-known approach to increasing parallelism and performance. We address the problem of software pipelining for heterogeneous parallel platforms that consist of different multi-core and many-core processing units. In this context, pipelini...
 
A Trusted Virtual Machine in an Untrusted Management Environment
Found in: IEEE Transactions on Services Computing
By Chunxiao Li,Anand Raghunathan,Niraj K. Jha
Issue Date:September 2012
pp. 472-483
Virtualization is a rapidly evolving technology that can be used to provide a range of benefits to computing systems, including improved resource utilization, software portability, and reliability. Virtualization also has the potential to enhance security ...
 
PIC: Partitioned Iterative Convergence for Clusters
Found in: 2012 IEEE International Conference on Cluster Computing (CLUSTER)
By Reza Farivar,Anand Raghunathan,Srimat Chakradhar,Harshit Kharbanda,Roy H. Campbell
Issue Date:September 2012
pp. 391-401
Iterative-convergence algorithms are frequently used in a variety of domains to build models from large data sets. Cluster implementations of these algorithms are commonly realized using parallel programming models such as MapReduce. However, these impleme...
 
Adaptation of video encoding to address dynamic thermal management effects
Found in: 2012 International Green Computing Conference (IGCC)
By Ali Mirtar,Sujit Dey,Anand Raghunathan
Issue Date:June 2012
pp. 1-10
Dynamic Thermal Management (DTM) acts as a necessary tool for safe operation of systems and increases their lifetime; however, application of DTM affects system performance, and can significantly impact the quality of results of complex real-time applicati...
 
MACACO: Modeling and analysis of circuits for approximate computing
Found in: Computer-Aided Design, International Conference on
By Rangharajan Venkatesan,Amit Agarwal,Kaushik Roy,Anand Raghunathan
Issue Date:November 2011
pp. 667-673
Approximate computing, which refers to a class of techniques that relax the requirement of exact equivalence between the specification and implementation of a computing system, has attracted significant interest in recent years. We propose a systematic met...
 
Energy efficient many-core processor for recognition and mining using spin-based memory
Found in: Nanoscale Architectures, IEEE International Symposium on
By Rangharajan Venkatesan,Vinay K. Chippa,Charles Augustine,Kaushik Roy,Anand Raghunathan
Issue Date:June 2011
pp. 122-128
Emerging workloads such as Recognition, Mining and Synthesis present great opportunities for many-core parallel computing, but also place significant demands on the memory system. Spin-based devices have shown great promise in enabling high-density, energy...
 
Integrated Systems In The More-Than-Moore Era: Designing Low-Cost Energy-Efficient Systems Using Heterogeneous Components
Found in: IEEE Design and Test of Computers
By Kaushik Roy,Byunghoo Jung,Dimitrios Peroulis,Anand Raghunathan
Publication Date: April 2011
pp. N/A
Moore&#x2019;s law has provided a metronome for semiconductor technology over the past four decades. However, when CMOS transistor feature size and interconnect dimensions approach their fundamental limits, aggressive scaling will no longer play a sign...
 
Secure Virtual Machine Execution under an Untrusted Management OS
Found in: Cloud Computing, IEEE International Conference on
By Chunxiao Li, Anand Raghunathan, Niraj K. Jha
Issue Date:July 2010
pp. 172-179
Virtualization is a rapidly evolving technology that can be used to provide a range of benefits to computing systems, including improved resource utilization, software portability, and reliability. For security-critical applications, it is highly desirable...
 
A Secure User Interface for Web Applications Running Under an Untrusted Operating System
Found in: Computer and Information Technology, International Conference on
By Chunxiao Li, Anand Raghunathan, Niraj K. Jha
Issue Date:July 2010
pp. 865-870
Many security-critical web applications, such as online banking and e-commerce, require a secure communication path between the user and a remote server. Securing this endto- end path is challenging and can be broken down into several segments. The network...
 
A framework for efficient and scalable execution of domain-specific templates on GPUs
Found in: Parallel and Distributed Processing Symposium, International
By Narayanan Sundaram,Anand Raghunathan,Srimat T. Chakradhar
Issue Date:May 2009
pp. 1-12
Graphics Processing Units (GPUs) have emerged as important players in the transition of the computing industry from sequential to multi- and many-core computing. We propose a software framework for execution of domain-specific parallel templates on GPUs, w...
 
Best-effort parallel execution framework for Recognition and mining applications
Found in: Parallel and Distributed Processing Symposium, International
By Jiayuan Meng,Srimat Chakradhar,Anand Raghunathan
Issue Date:May 2009
pp. 1-12
Recognition and mining (RM) applications are an emerging class of computing workloads that will be commonly executed on future multi-core and many-core computing platforms. The explosive growth of input data and the use of more sophisticated algorithms in ...
 
Coping with Variations through System-Level Design
Found in: VLSI Design, International Conference on
By Nilanjan Banerjee, Saumya Chandra, Swaroop Ghosh, Sujit Dey, Anand Raghunathan, Kaushik Roy
Issue Date:January 2009
pp. 581-586
Manufacturing and operation-induced variations have emerged as a critical challenge in designing integrated circuits (ICs) under the nanometer technology regime. Most work on addressing variations has focused on device, circuit, and logic-level solutions. ...
 
Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Janar Thoguluva, Anand Raghunathan, Srimat T. Chakradhar
Issue Date:March 2008
pp. 1148-1153
Cryptographic accelerators and security processors are often used in embedded systems in order to enable enhanced security without significantly impacting performance or power consumption. However, realizing the performance promised by them requires the de...
 
Automatic Power Modeling of Infrastructure IP for System-on-Chip Power Analysis
Found in: VLSI Design, International Conference on
By Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan
Issue Date:January 2007
pp. 513-520
<p>Modern System-on-Chips (SoCs) are often designed under stringent time-to-market constraints. Hence, they are realized by re-using a number of pre-designed components (or IP blocks) that implement standard, yet critical functions. An important cate...
 
Active Learning Driven Data Acquisition for Sensor Networks
Found in: Computers and Communications, IEEE Symposium on
By Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha
Issue Date:June 2006
pp. 929-934
Online monitoring of a physical phenomenon over a geographical area is a popular application of sensor networks. Networks representative of this class of applications are typically operated in one of two modes, viz. an always-on mode where every sensor rea...
 
Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors
Found in: VLSI Design, International Conference on
By Fei Sun, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:January 2006
pp. 473-476
Classical hardware/software partitioning techniques, recent advances in application-specific instruction set architecture (ISA) design tools, etc., provide avenues to address the individual problems of co-processor generation and custom instruction additio...
 
Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors
Found in: VLSI Design, International Conference on
By Fei Sun, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:January 2005
pp. 551-556
<p>Nanometer fabrication technologies have made it feasible to integrate multiple processors on a single chip. Heterogeneous multiprocessor systems-on-chip (MPSoCs), in which different processors are customized for specific tasks, can provide high le...
 
Power Analysis of System-Level On-Chip Communication Architectures
Found in: Hardware/software codesign and system synthesis, International conference on
By Kanishka Lahiri, Anand Raghunathan
Issue Date:September 2004
pp. 236-241
<p>For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumption. Managing and optimizing this important component of SoC power re...
 
Automated Energy/Performance Macromodeling of Embedded Software
Found in: Design Automation Conference
By Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha
Issue Date:June 2004
pp. 99-102
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estimation by exploiting reuse that is inherent in the design process. Macromodeli...
 
Security as a New Dimension in Embedded System Design
Found in: Design Automation Conference
By Paul Kocher, Ruby Lee, Gary McGraw, Anand Raghunathan, Srivaths Ravi
Issue Date:June 2004
pp. 753-760
The growing number of instances of breaches in information security in the last few years has created a compelling case for efforts towards secure electronic systems. Embedded systems, which will be ubiquitously used to capture, store, manipulate, and acce...
 
A Scalable Application-Specific Processor Synthesis Methodology
Found in: Computer-Aided Design, International Conference on
By Fei Sun, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
Issue Date:November 2003
pp. 283
Custom processors based on application-specific or domain-specific instruction sets are gaining popularity, and are often used to implement critical architectural blocks in complex system-on-chips. While several advances have been made in custom processor ...
 
Efficient RTL Power Estimation for Large Designs
Found in: VLSI Design, International Conference on
By Srivaths Ravi, Anand Raghunathan, Srimat Chakradhar
Issue Date:January 2003
pp. 431
The adoption of register-transfer level (RTL) sign-off in ASIC design methodologies, and the increasing scale of system-on-chip integration, are leading to unprecedented accuracy and efficiency demands on RT-level estimation tools. In this work, we focus o...
 
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