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Displaying 1-37 out of 37 total
Test Technology TC Newsletter
Found in: IEEE Design and Test of Computers
By Paolo Prinetto, Alfredo Benso
Issue Date:March 2004
pp. 164-165
No summary available.
 
Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications
Found in: IEEE Transactions on Computers
By Alfredo Benso, Yiorgos Makris, Pinaki Mazumder
Issue Date:April 2011
pp. 450-451
No summary available.
 
A Self-Repairing Execution Unit for Microprogrammed Processors
Found in: IEEE Micro
By Alfredo Benso, Silvia Chiusano, Paolo Prinetto
Issue Date:September 2001
pp. 16-22
This processor dynamically reconfigures its internal microcode to execute each instruction using only fault-free blocks from the execution unit. Working without redundant or spare computational blocks, this self-repair approach permits a graceful performan...
 
Online and Offline BIST in IP-Core Design
Found in: IEEE Design and Test of Computers
By Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bondoni
Issue Date:September 2001
pp. 92-99
<p>This article presents an online and offline built-in self-test architecture implemented as an SRAM intellectual-property core for telecommunication applications. The architecture combines fault-latency reduction, code-based fault detection, and ar...
 
Augmented Reading: The Present and Future of Electronic Scientific Publications
Found in: Computer
By Paolo Montuschi,Alfredo Benso
Issue Date:January 2014
pp. 64-74
As technological, economic, and social factors drive scientific publishing toward electronic formats, opportunities open beyond traditional reading and writing frameworks. Journal articles now, and in the future, can increasingly include a variety of suppl...
 
Combining homolog and motif similarity data with Gene Ontology relationships for protein function prediction
Found in: 2012 IEEE International Conference on Bioinformatics and Biomedicine (BIBM)
By Hafeez Ur Rehman,Alfredo Benso,Stefano Di Carlo,Gianfranco Politane,Alessandro Savino,Prashanth Suravajhala
Issue Date:October 2012
pp. 1-4
Uncharacterized proteins pose a challenge not just to functional genomics, but also to biology in general. The knowledge of biochemical functions of such proteins is very critical for designing efficient therapeutic techniques. The bottleneck in hypothetic...
 
A cDNA Microarray Gene Expression Data Classifier for Clinical Diagnostics Based on Graph Theory
Found in: IEEE/ACM Transactions on Computational Biology and Bioinformatics
By Alfredo Benso, Stefano Di Carlo, Gianfranco Politano
Issue Date:May 2011
pp. 577-591
Despite great advances in discovering cancer molecular profiles, the proper application of microarray technology to routine clinical diagnostics is still a challenge. Current practices in the classification of microarrays' data show two main limitations: t...
 
GPU acceleration for statistical gene classification
Found in: International Conference on Automation, Quality and Testing, Robotics
By Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Alessandro Savino
Issue Date:May 2010
pp. 1-6
The use of Bioinformatic tools in routine clinical diagnostics is still facing a number of issues. The more complex and advanced bioinformatic tools become, the more performance is required by the computing platforms. Unfortunately, the cost of parallel co...
 
Are IEEE-1500-Compliant Cores Really Compliant to the Standard?
Found in: IEEE Design and Test of Computers
By Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Paolo Prinetto
Issue Date:May 2009
pp. 16-24
<p>Editor's note:</p><p>Functional verification of complex SoC designs is a challenging task, which fortunately is increasingly supported by automation. This article proposes a verification component for IEEE Std 1500, to be plugged into ...
 
Gene expression reliability estimation through cluster-based analysis
Found in: Medical Measurement and Applications
By Luca Sterpone, Alfredo Benso, Stefano Di Carlo, Gianfranco Politano
Issue Date:May 2009
pp. 229-231
Gene expression is the fundamental control of the structure and functions of the cellular versatility and adaptability of any organisms. The measurement of gene expressions is performed on images generated by optical inspection of microarray devices which ...
 
March Test Generation Revealed
Found in: IEEE Transactions on Computers
By Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
Issue Date:December 2008
pp. 1704-1713
Memory testing commonly faces two issues: the characterization of detailed and realistic fault models, and the definition of time-efficient test algorithms to detect them. March tests have proven to be a fast, simple and regularly structured class of memor...
 
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC
Found in: On-Line Testing Symposium, IEEE International
By Mohammad Hosseinabady, M.H. Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale
Issue Date:July 2007
pp. 205-206
This paper proposes an analytical method to assess the soft-error rate (SER) in the early stages of a System-on-Chip (SoC) platform-based design methodology. The proposed method gets an executable UML (Unified Modeling Language) model of the SoC and the ra...
   
Single-Event Upset Analysis and Protection in High Speed Circuits
Found in: European Test Symposium, IEEE
By Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto
Issue Date:May 2006
pp. 29-34
The effect of Single-Event Transients (SETs) (at a combinational node of a design) on the system reliability is becoming a big concern for ICs manufactured using advanced technologies. An SET at a node of combinational part may cause a transient pulse at t...
 
Towards Microagent based DBIST/DBISR
Found in: Test Conference, International
By Liviu Miclea, Szilard Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto
Issue Date:October 2004
pp. 867-874
<p>In this paper, we present some ideas and experiments on using microagents for testing and repairing a distributed system, whose elements may or may not have embedded BIST (Built In Self Test) and BISR (Built In Self Repair) facilities.</p> &...
 
Self-Testing and Self-Healing via Mobile Agents
Found in: Test Conference, International
By Alfredo Benso
Issue Date:October 2003
pp. 1320
No summary available.
   
A Hierarchical Infrastructure for SoC Test Management
Found in: IEEE Design and Test of Computers
By Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian
Issue Date:July 2003
pp. 32-39
<p>HD2BIST?a complete hierarchical framework for BIST scheduling, data-patterns delivery, and diagnosis of complex systems?maximizes and simplifies the reuse of built-in test architectures. HD2BIST optimizes flexibility for chip designers planning an...
 
A Watchdog Processor to Detect Data and Control Flow Errors
Found in: On-Line Testing Symposium, IEEE International
By Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
Issue Date:July 2003
pp. 144
A watchdog processor for the MOTOROLA M68040? microprocessor is presented. Its main task is to protect from transient faults caused by SEU?s the transmission of data between the processor and the system memory, and to ensure a correct instructions? flow, j...
 
Online Self-Repair of FIR Filters
Found in: IEEE Design and Test of Computers
By Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
Issue Date:May 2003
pp. 50-57
<p><em>Editor?s note:</em><div>Chip-level failure detection has been a target of research for some time, but today?s very deep-submicron technology is forcing such research to move beyond detection. Repair, especially self-repair, h...
 
Efficient Design of System Test: A Layered Architecture
Found in: Test Conference, International
By Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei
Issue Date:October 2002
pp. 930
<p>Starting from the idea of a general methodology to transform design specifications into system level functional test patterns for complex embedded systems, we propose a layered architecture as basis of such process. The architecture aims at strong...
 
Itelligent Agents and BIST/BISR — Working Together in Distributed Systems
Found in: Test Conference, International
By Liviu Miclea, Enyedi Szilárd, Alfredo Benso
Issue Date:October 2002
pp. 940
<p>This paper presents an attempt of using intelligent agents for testing and repairing a distributed system, whose elements may or may not have embedded BIST (Built-In Self-Test) and BISR (Built-In Self-Repair) facilities.</p> <p>The age...
 
DFT and BIST of a Multichip Module for High-Energy Physics Experiments
Found in: IEEE Design and Test of Computers
By Alfredo Benso, Silvia Chiusano, Paolo Prinetto
Issue Date:May 2002
pp. 94-105
<p>Engineers at Politecnico di Torino designed a multichip module for high-energy physics experiments conducted on the Large Hadron Collider. An array of these MCMs handles multichannel data acquisition and signal processing. Testing the MCM from boa...
 
Memory Read Faults: Taxonomy and Automatic Test Generation
Found in: Asian Test Symposium
By Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
Issue Date:November 2001
pp. 157
This paper presents an innovative algorithm for the automatic generation of March Tests. The proposed approach is able to generate an optimal March Test for an unconstrained set of memory faults in very low computation time. Moreover, we propose a new comp...
 
Control-Flow Checking via Regular Expressions
Found in: Asian Test Symposium
By Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri
Issue Date:November 2001
pp. 299
The present paper explains a new approach to program control-flow checking. The check has inserted at source-code level using a signature methodology based on regular expressions. The signature checking is performed without dedicated watchdog processor but...
 
Validation of a Software Dependability Tool via Fault Injection Experiments
Found in: On-Line Testing Workshop, IEEE International
By Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto
Issue Date:July 2001
pp. 0003
Abstract: The present paper presents the validation of the strategies employed in the RECCO tool to analyze a C/C++ software; the RECCO compiler scans C/C++ source code to extract information about the significance of the variables that populate the progra...
 
SEU Effect Analysis in a Open-Source Router via a Distributed Fault Injection Environment
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
Issue Date:March 2001
pp. 0219
Abstract: The paper presents a detailed error analysis and classification of the behavior of an open-source router, when affected by Single Event Upsets (SEUs). The experimental results have been gathered on a real communication network, resorting to an ad...
 
'BOND': An Interposition Agents Based Fault Injector for Windows NT
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Andrea Baldini, Alfredo Benso, Silvia Chiusano, Paolo Prinetto
Issue Date:October 2000
pp. 387
The goal of this paper is to present BOND, a Software Fault Injection tool able to simulate abnormal behavior of a computer system running Windows NT 4.0 Operating System. The Fault Injector is based on interposition techniques, which guarantees a low impa...
 
An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications
Found in: Computer Design, International Conference on
By Alfredo Benso, Stefano Martinetto, Paolo Prinetto, Riccardo Mariani
Issue Date:September 2000
pp. 537
This paper presents a Fault Injection tool developed to evaluate different DSP-based architectures for space applications. The evaluation addresses mainly the ability of the different architectures to detect Single-Event-Upset (SEU) faults induced by space...
 
A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT
Found in: On-Line Testing Workshop, IEEE International
By Alfredo Benso, Silvia Chiusano, Paolo Prinetto
Issue Date:July 2000
pp. 9
This paper presents a software toolkit that allows enhancing the fault tolerant characteristics of a user application running under a Windows NT platform through sets of interchangeable and customizable Fault Tolerant Interposition Agents (FTI Agents). Int...
 
An Effective Distributed BIST Architecture for RAMs
Found in: European Test Workshop, IEEE
By Monica Lobetti Bodoni, Alfredo Benso, Silvia Chiusano, Stefano di Carlo, Giorgio di Natale, Paolo Prinetto
Issue Date:May 2000
pp. 119
The present paper proposes a solution to the problem of testing a system containing many distributed memories of different sizes. The proposed solution relies in the development of a BIST architecture characterized by a single BIST Processor, implemented a...
 
An On-Line BISTed SRAM IP Core
Found in: Test Conference, International
By Monica Lobetti-Bondoni, Alessio Pricco, Alfredo Benso, Silvia Chiusano, Paolo Prinetto
Issue Date:September 1999
pp. 993
In digital systems design, strict reliability constraints usually impose very low fault latency and high degree of fault detection of permanent and transient faults. In particular, memory modules, as either devices or IP cores, appeared as one of the most ...
 
HD-BIST: A Hierarchical Framework for BIST Scheduling and Diagnosis in SoCs
Found in: Test Conference, International
By Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian
Issue Date:September 1999
pp. 1038
This paper proposes HD-BIST, a complete framework to support the definition of the scheduling strategy and mechanism of the BISTed blocks of a complex system. Three different layers are presented, to define the HD-BIST approach in terms of a set of high-le...
 
Testing An MCM For High-Energy Physics Experiments: A Case Study
Found in: Test Conference, International
By Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Simone Giovannetti, Riccardo Mariani, Silvano Motto
Issue Date:September 1999
pp. 38
This paper presents the test strategy adopted at different hierarchical abstraction levels (from board to die level) during the development of a multi-channel data acquisition and signal processing MCM, designed for the new generation experiments of high-e...
 
Alice in "Bio-Land": Engineering Challenges in the World of Life Sciences
Found in: IT Professional
By Alfredo Benso Stefano Di Carlo,Gianfranco Politano,Alessandro Savino,Enrico Bucci
Issue Date:July 2014
pp. 38-47
Alice is an engineer who ventures into the research world of life sciences. To her eyes, life sciences researchers work backwards compared to what happens in her world. It appears that their research methodology has a number of issues that may limit its po...
 
A Programmable BIST Architecture for Clusters of Multiple-Port SRAMs
Found in: Test Conference, International
By Alfredo BENSO, Stefano DI CARLO, Giorgio DI NATALE, Paolo PRINETTO
Issue Date:October 2000
pp. 557
This paper presents a BIST architecture, based on a single micro-programmable BIST Processor and a set of memory Wrappers, designed to simplify the test of a system containing many distributed multi-port SRAMs of different sizes (number of bits, number of ...
 
A cDNA Microarray Gene Expression Data Classifier for Clinical Diagnostics Based on Graph Theory
Found in: IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
By Alfredo Benso, Gianfranco Politano, Stefano Di Carlo
Issue Date:May 2011
pp. 577-591
Despite great advances in discovering cancer molecular profiles, the proper application of microarray technology to routine clinical diagnostics is still a challenge. Current practices in the classification of microarrays' data show two main limitations: t...
     
ATPG for Dynamic Burn-In Test in Full-Scan Circuits
Found in: Asian Test Symposium
By Alfredo BENSO, Alberto BOSIO, Stefano DI CARLO, Giorgio DI NATALE, Paolo PRINETTO
Issue Date:November 2006
pp. 75-82
Yield and reliability are two key factors affecting costs and profits in the semiconductor industry. Stress testing is a technique based on the application of higher than usual levels of stress to speed up the deterioration of electronic devices and increa...
 
TOWARDS A UNIFIED TEST PROCESS: FROM UML TO END-OF-LINE FUNCTIONAL TEST
Found in: Test Conference, International
By Andrea BALDINI, Alfredo BENSO, Paolo PRINETTO, Sergio MO, Andrea TADDEI
Issue Date:November 2001
pp. 600
In this paper, we propose the use of a UML methodology to go from user requirements and specifications to end of production testing of complex embedded systems. We consider behavioral, structural and physical levels building a comprehensive and modular mod...
 
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