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Displaying 1-50 out of 162 total
Mixed Signal System Level Cross Layer Adaptation for Variability and Workload: A Pilot Study
Found in: Mixed-Signals, Sensors, and Systems Test Workshop, IEEE 14th International
By Shreyas Sen,Jayaram Natarajan,Joshua W. Wells,Abhijit Chatterjee
Issue Date:May 2011
pp. 13-18
Mixed-signal modules are being used extensively in real-time cyber-physical system design. Such real-time systems experience large changes in workload. In addition, due to the use of aggressively scaled silicon technologies, the nominal performances of ICs...
 
Reconfiguration for Enhanced ALternate Test (REALTest) of Analog Circuits
Found in: Asian Test Symposium
By Ganesh Srinivasan, Shalabh Goyal, Abhijit Chatterjee
Issue Date:November 2004
pp. 302-307
An efficient design for test methodology to increase the test yield of analog circuits is presented. It is assumed that the analog circuits are tested using alternate tests that replace conventional specification-based testing procedures. The proposed appr...
 
Keynote and Plenary Talks
Found in: 2012 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
By Andrew B. Kahng,Fadi J. Kurdahi,Abhijit Chatterjee,Fabio Campi
Issue Date:August 2012
pp. xix-xxiii
These keynote discusses the following: DfX and Signoff: The Coming Challenges and Opportunities; Application-Aware System Design for Late and Post Silicon Eras; RF/Mixed-Signal Real-Time Adaptation for Error Resilience, Low Power and Peformance; and The Lo...
   
Cognitive self-adaptive computing and communication systems: Test, control and adaptation
Found in: Design and Diagnostics of Electronic Circuits and Systems
By Abhijit Chatterjee
Issue Date:April 2009
pp. 2
CMOS technology scaling along with the resulting large variability of circuit performance has made post-silicon circuit and algorithmic level built-in test and adaptation/tuning almost a necessity for deeply scaled technologies. Currently, circuits are des...
   
Environment and Process Adaptive Low Power Wireless Baseband Signal Processing Using Dual Real-Time Feedback
Found in: VLSI Design, International Conference on
By Muhammad Mudassar Nisar, Abhijit Chatterjee
Issue Date:January 2009
pp. 57-62
As technology scales below the 45nm CMOS technology node, RF front ends and baseband processors will need to be aggressively overdesigned to work reliably under worst case channel (environment) conditions as well as worst case manufacturing variations. In ...
 
Efficient Low-Cost Testing of Wireless OFDM Polar Transceiver Systems
Found in: Asian Test Symposium
By Deuk Lee, Vishwanath Natarajan, Raj Senguttuvan, Abhijit Chatterjee
Issue Date:November 2008
pp. 55-60
Polar radio architectures are attractive due to the ability to implement them using largely digital architectures. However, testing for specs such as EVM incurs significant test time due to the large numbers of symbols that need to be transmitted. In our a...
 
Efficient testing of wireless polar transmitters
Found in: Mixed-Signals, Sensors, and Systems Test Workshop, IEEE 14th International
By Deuk Lee, Rajarajan Senguttuvan, Abhijit Chatterjee
Issue Date:June 2008
pp. 1-5
Polar radio architectures are gaining in popularity due to the promise of an all digital implementations in future CMOS systems-on-chip (SoCs) solutions. Test cost is an important consideration for manufacturers developing these complex devices. Phase nois...
 
Built-in Test of Frequency Modulated RF Transmitters Using Embedded Low-Pass Filters
Found in: European Test Symposium, IEEE
By Rajarajan Senguttuvan, Hyun Choi, Donghoon Han, Abhijit Chatterjee
Issue Date:May 2008
pp. 41-46
Frequency modulation is used in many important communication and wireless applications. A key defining characteristic of frequency modulated systems is the constant amplitude of the transmitted signal making it impossible to use envelope-based built-in tes...
 
ACT: Adaptive Calibration Test for Performance Enhancement and Increased Testability of Wireless RF Front-Ends
Found in: VLSI Test Symposium, IEEE
By Vishwanath Natarajan, Rajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee
Issue Date:May 2008
pp. 215-220
In this paper, a novel adaptive calibration technique for advanced RF front-ends is proposed in which sensors are implanted in the transmitter and the observed device test response to a special calibration test is compared against the known golden response...
 
Specification-Driven Test Design for Analog Circuits
Found in: Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
By Pramodchandran N. Variyam, Abhijit Chatterjee
Issue Date:November 1998
pp. 335
In this paper we present a test generation approach for time and frequency domain testing of analog circuits. Tests are generated to detect faulty circuits which violate one or more circuit specifications with- out explicitly performing exhaustive specific...
 
Testing NASA's 3D-Stack MCM Space Flight Computer
Found in: IEEE Design and Test of Computers
By Koppol Sasidhar, Leon Alkalai, Abhijit Chatterjee
Issue Date:July 1998
pp. 44-55
Advanced packaging technologies such as 3D chip stacking, multichip modules (MCMs), and 3D stacks of MCMs provide opportunities for significant reductions in system mass, volume and power. They also pose major testing challenges that need to be resolved be...
 
Test Generation for Comprehensive Testing of Linear Analog Circuits Using Transient response Sampling
Found in: Computer-Aided Design, International Conference on
By Pramodchandran N. Variyam, Abhijit Chatterjee
Issue Date:November 1997
pp. 382
The problem of testing analog components continues to be the bottleneck in reducing the time-to-market of mixed-signal ICs. In this paper, we present a test generation algorithm for implicit functional testing of linear analog circuits using transient resp...
 
Timing Variation Adaptive Pipeline Design: Using Probabilistic Activity Completion Sensing with Backup Error Resilience
Found in: 2014 27th International Conference on VLSI Design
By Jayaram Natarajan,Sahil Kapoor,Debesh Bhatta,Abhijit Chatterjee,Adit Singh
Issue Date:January 2014
pp. 122-127
Modern microprocessor pipelines experience timing uncertainties due to manufacturing process variations, thermal variations, supply voltage droop and data-dependent path delays. This leads to power and/or performance inefficiencies in current timing guard ...
 
Time Domain Reconstruction of Incoherently Undersampled Periodic Waveforms Using Bandwidth Interleaving
Found in: 2013 22nd Asian Test Symposium (ATS)
By Debesh Bhatta,Nicholas Tzou,Sen-wen Hsiao,Abhijit Chatterjee
Issue Date:November 2013
pp. 283-288
Incoherent undersampling provides a low cost solution for wideband periodic waveform acquisition without the requirement for synchronization with the source clock. The bandwidth of a traditional incoherent undersampling based test setup is limited by the t...
 
Analog Sensor Based Testing of Phase-Locked Loop Dynamic Performance Parameters
Found in: 2013 22nd Asian Test Symposium (ATS)
By Sen-Wen Hsiao,Xian Wang,Abhijit Chatterjee
Issue Date:November 2013
pp. 50-55
Phase-locked loops are used to synthesize frequency sources for RF conversion and IO clocks for data synchronization, and serve as core building blocks for communication systems. Consequently, testing of PLL loop performance is critical for guaranteeing th...
 
Built-In Test of Switched-Mode Power Converters: Avoiding DUT Damage Using Alternative Safe Measurements
Found in: 2013 22nd Asian Test Symposium (ATS)
By Xian Wang,Blanchard Kenfack,Estella Silva,Abhijit Chatterjee
Issue Date:November 2013
pp. 56-61
This paper proposes a novel test method for the line and load regulation specifications of switched mode power converters (SMPCs) using alternative safe measurements. These specifications are not tested for many power converters because they cause voltage ...
 
Enhanced Resolution Time-Domain Reflectometry for High Speed Channels: Characterizing Spatial Discontinuities with Non-ideal Stimulus
Found in: 2013 22nd Asian Test Symposium (ATS)
By Suvadeep Banerjee,Hyun Woo Choi,David C. Keezer,Abhijit Chatterjee
Issue Date:November 2013
pp. 277-282
In the recent past, there has been steady growth in the data transfer rate of modern digital serial communication systems. Consequently, accurate characterization of high-speed signal transmission lines is necessary for ensuring high signal integrity. Time...
 
Low-cost multi-channel testing of periodic signals using monobit receivers and incoherent subsampling
Found in: 2013 IEEE 31st VLSI Test Symposium (VTS)
By Thomas Moon,Hyun Woo Choi,Abhijit Chatterjee
Issue Date:April 2013
pp. 1-6
This paper proposes a new method to reconstruct signal by a monobit receiver based on incoherent subsampling. The proposed method uses a time-variant threshold voltage for the monobit receiver to increase its amplitude resolution. By our methodology, the t...
 
RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning
Found in: 2013 IEEE 31st VLSI Test Symposium (VTS)
By Barry Muldrey,Sabyasachi Deyati,Michael Giardino,Abhijit Chatterjee
Issue Date:April 2013
pp. 1-6
With trends in mixed-signal systems-on-chip indicating increasingly extreme scaling of device dimensions and higher levels of integration, the tasks of both design and device validation is becoming increasingly complex. Post-silicon validation of mixed-sig...
 
A programmable BIST design for PLL static phase offset estimation and clock duty cycle detection
Found in: 2013 IEEE 31st VLSI Test Symposium (VTS)
By Sen-Wen Hsiao,Nicholas Tzou,Abhijit Chatterjee
Issue Date:April 2013
pp. 1-6
Reference spur is a nonlinear effect and important specification in PLL for long term jitter. Periodic events of reference clock create a static phase offset between signals. The finite phase offset comes from charge pump mismatch and layout asymmetry. Thi...
 
A High Throughput Multiplier Design Exploiting Input Based Statistical Distribution in Completion Delays
Found in: 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems
By Ravi Tej Uppu,Ravi Kanth Uppu,Adit D. Singh,Abhijit Chatterjee
Issue Date:January 2013
pp. 109-114
Design methodologies such as Razor [3,4] minimize power dissipation by slowing down circuits so as to eliminate timing slacks to the point where occasional timing errors are observed. The main challenge here is the design of efficient mechanisms to detect ...
 
Adaptive RF Front-end Design via Self-discovery: Using Real-time Data to Optimize Adaptation Control
Found in: 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems
By Debashis Banerjee,Aritra Banerjee,Abhijit Chatterjee
Issue Date:January 2013
pp. 197-202
It has been established in prior research that significant power can be saved by dynamically trading off the performance of individual RF modules for power consumption across changing channel conditions. It has also been shown that the control law that rec...
 
VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests
Found in: 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems
By Sabyasachi Deyati,Aritra Banerjee,Barry John Muldrey,Abhijit Chatterjee
Issue Date:January 2013
pp. 314-319
Post-silicon validation of RF/mixed-signal circuits is challenging due to the need to excite all possible operational modes of the DUT in order to establish equivalence between its specified and observed behaviors and to ensure that the DUT does not produc...
 
Low-cost wideband periodic signal reconstruction using incoherent undersampling and back-end cost optimization
Found in: 2012 IEEE International Test Conference (ITC)
By Nicholas Tzou,Debesh Bhatta,Sen-Wen Hsiao,Hyun Woo Choi,Abhijit Chatterjee
Issue Date:November 2012
pp. 1-10
Acquisition of wide bandwidth signals is a significant problem in manufacturing test due to the cost of test equipment driven by the use of high-speed sample and hold circuitry and difficulty in data-clock synchronization. We propose to combine frequency i...
 
Low cost high-speed test data acquisition: Accurate period estimation driven signal reconstruction using incoherent subsampling
Found in: 2012 IEEE International Test Conference (ITC)
By Thomas Moon,Hyun Woo Choi,Abhijit Chatterjee
Issue Date:November 2012
pp. 1-9
In this paper, we propose a new algorithm to estimate the fundamental period (frequency) of a highspeed pseudo random bit sequence (PRBS) or multitone signal using incoherent subsampling. While incoherent subsampling suffers from spectral leakage due to th...
 
Higher than Nyquist test waveform synthesis and digital phase noise injection using time-interleaved mixed-mode data converters
Found in: 2012 IEEE International Test Conference (ITC)
By Xian Wang,Hyun Woo Choi,Thomas Moon,Nicholas Tzou,Abhijit Chatterjee
Issue Date:November 2012
pp. 1-10
In this paper, a higher than Nyquist RF test waveform synthesizer with digital phase noise injection is proposed. The proposed system uses time-interleaved digital-to-analog converters (DACs) and associated digital signal processing algorithms to enhance t...
 
Spectral Estimation Based Acquisition of Incoherently Under-sampled Periodic Signals: Application to Bandwidth Interleaving
Found in: 2012 21st Asian Test Symposium (ATS)
By Debesh Bhatta,Nicholas Tzou,Hyun Choi,Abhijit Chatterjee
Issue Date:November 2012
pp. 196-201
Acquisition of periodic waveforms is an integral part of characterizing high speed system performance. Various techniques are used to reduce the equipment cost, dominated by the cost of the digitizer. Incoherent under-sampling provides an attractive soluti...
 
Pilot symbol driven monitoring of electrical degradation in RF transmitter systems using model anomaly diagnosis
Found in: 2012 IEEE 18th International On-Line Testing Symposium (IOLTS 2012)
By Sabyasachi Deyati,Aritra Banerjee,Abhijit Chatterjee
Issue Date:June 2012
pp. 142-145
Modern RF circuits suffer from increased electrical degradation induced by electrical stress and thermal effects due to the high speeds of operation and the effects of technology scaling. Detection of such degradation is important, particularly in wireless...
 
Concurrent Device/Specification Cause -- Effect Monitoring for Yield Diagnosis Using Alternate Diagnostic Signatures
Found in: IEEE Design & Test of Computers
By Shyam Kumar Devarakond,Shreyas Sen,Soumendu Bhattacharya,Abhijit Chatterjee
Issue Date:January 2012
pp. 48-58
Editor's note:
 
Real-Time, Content Aware Camera -- Algorithm -- Hardware Co-Adaptation for Minimal Power Video Encoding
Found in: VLSI Design, International Conference on
By Joshua W. Wells,Jayaram Natarajan,Abhijit Chatterjee,Irtaza Barlas
Issue Date:January 2012
pp. 245-250
In this paper, a content aware, low power video encoder design is presented in which the algorithms and hardware are co-optimized to adapt concurrently to video content in real-time. Natural image statistical models are used to form spatiotemporal predicti...
 
Power Aware Post-Manufacture Tuning of MIMO Receiver Systems
Found in: VLSI Design, International Conference on
By Debashis Banerjee,Shreyas Sen,Shyam Kumar Devarakond,Abhijit Chatterjee
Issue Date:January 2012
pp. 143-148
This paper presents a methodology for post-manufacture tuning of MIMO (Multiple-Input-Multiple-Output) wireless systems aimed at increasing device manufacturing yield under large process variations. The goal is to achieve specified system-level EVM (Error ...
 
Distributed Comparison Test Driven Multiprocessor Speed-Tuning: Targeting Performance Gains under Extreme Process Variations
Found in: Asian Test Symposium
By Jayaram Natarajan,Joshua Wells,Abhijit Chatterjee,Adit Singh
Issue Date:November 2011
pp. 154-160
Exhaustive speed testing of all the cores under extreme inter and intra-die process variations in a large chip multi processor (CMP) is expensive in terms of test time and may not guarantee full CMP functionality due to lack of coverage of timing failures ...
 
Diagnosing Multiple Slow Gates for Performance Tuning in the Face of Extreme Process Variations
Found in: Asian Test Symposium
By Xi Qian,Adit D. Singh,Abhijit Chatterjee
Issue Date:November 2011
pp. 303-310
End-of-road map CMOS (<=10nm) technology is expected to display extreme random variability in device parameters, resulting in a very large spread in the speed of individual gates. Based on reasonable statistical estimates, virtually every large circuit ...
 
Time Domain Characterization and Test of High Speed Signals Using Incoherent Sub-sampling
Found in: Asian Test Symposium
By Debesh Bhatta,Joshua W. Wells,Abhijit Chatterjee
Issue Date:November 2011
pp. 21-26
High speed signal acquisition and characterization contributes a significant amount to the total test cost of the finished product in modern high speed systems. Incoherent under-sampling allows robust and low cost signal acquisition without requiring a pri...
 
Optimized Multitone Test Stimulus Driven Diagnosis of RF Transceivers Using Model Parameter Estimation
Found in: VLSI Design, International Conference on
By Aritra Banerjee, Vishwanath Natarajan, Shreyas Sen, Abhijit Chatterjee, Ganesh Srinivasan, Soumendu Bhattacharya
Issue Date:January 2011
pp. 274-279
Test time and test complexity reduction has become a critical challenge in modern RF testing. Prior “alternative” test methods have achieved fast testing at the cost of using supervised learning algorithms that require “training”. In contrast, behavioral m...
 
Guided Probabilistic Checksums for Error Control in Low-Power Digital Filters
Found in: IEEE Transactions on Computers
By Mudassar M. Nisar,Abhijit Chatterjee
Issue Date:September 2011
pp. 1313-1326
In many DSP applications (image and voice processing), several dBs of SNR loss can be tolerated without noticeable impact on application level performance. For power optimization in such applications, voltage overscaling (VOS) can be used to operate the ar...
 
Analog Signature- Driven Postmanufacture Multidimensional Tuning of RF Systems
Found in: IEEE Design and Test of Computers
By Vishwanath Natarajan, Shreyas Sen, Aritra Banerjee, Abhijit Chatterjee, Ganesh Srinivasan, Friedrich Taenzler
Issue Date:November 2010
pp. 6-17
<p><it>Editor's note:</it></p><p>Tuning knobs are becoming common in analog and RF devices for postsilicon calibration for variation tolerance and compensation. This article presents a low-cost, hardware-iterative technique ba...
 
Jitter Characterization of Pseudo-random Bit Sequences Using Incoherent Sub-sampling
Found in: Asian Test Symposium
By Hyun Choi, Abhijit Chatterjee
Issue Date:December 2010
pp. 9-14
In this paper, jitter analysis algorithms for characterizing timing jitter of multi-Gbps pseudo-random bit sequences (PRBSs) are presented. For signal acquisition, incoherent sub-sampling is employed to increase the effective sampling rate of a digitizer a...
 
Rapid Radio Frequency Amplitude and Phase Distortion Measurement Using Amplitude Modulated Stimulus
Found in: Asian Test Symposium
By Shreyas Sen, Shyam Devarakond, Abhijit Chatterjee
Issue Date:December 2010
pp. 277-282
Testing of RF circuits for gain, nonlinearity and distortion specification generally requires the use of multiple test measurements and long test times contributing to increased test cost. Prior RF test methods have suffered from significant test calibrati...
 
Error resilient video encoding using Block-Frame Checksums
Found in: On-Line Testing Symposium, IEEE International
By Joshua W. Wells, Jayaram Natarajan, Abhijit Chatterjee
Issue Date:July 2010
pp. 289-294
In this paper, a soft error resilient video encoder design is presented. The design uses the inherent architecture of modern video encoders as a basis for building a checksum based error detection mechanism. Modern video encoders use previously coded data ...
 
Built-in performance monitoring of mixed-signal/RF front ends using real-time parameter estimation
Found in: On-Line Testing Symposium, IEEE International
By Shyam Kumar Devarakond, Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan, Abhijit Chatterjee
Issue Date:July 2010
pp. 77-82
In this paper, a novel methodology for continuous real time monitoring of the performance metrics of RF front end modules is proposed. The presented technique involves determination of the RF system parameters using time domain parameter estimation techniq...
 
Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?
Found in: On-Line Testing Symposium, IEEE International
By Abhijit Chatterjee, Jacob Abraham, Adit Singh, Elie Maricau, Rakesh Kumar, Christos Papachristou
Issue Date:June 2009
pp. 129
There has been ongoing debate regarding the use of voltage overscaling along with error resilience techniques for ultra low power operation of scaled CMOS logic. The issue is whether to build enough design margin into future electronic systems so that erro...
 
BIST-assisted power aware self healing RF circuits
Found in: Mixed-Signals, Sensors, and Systems Test Workshop, IEEE 14th International
By Shyam Kumar Devarakond, Vishwanath Natarajan, Shreyas Sen, Abhijit Chatterjee
Issue Date:June 2009
pp. 1-4
In this paper, a novel methodology for post manufacture tuning of RF circuits is presented. The procedure uses an iterative test-tune-test algorithm that applies a compact alternative test to the DUT and modulates circuit level tuning knobs (bias/supply va...
 
BIST assisted wideband digital compensation for MB-UWB transmitters
Found in: Design and Diagnostics of Electronic Circuits and Systems
By Shyam Kumar Devarakond, Shreyas Sen, Abhijit Chatterjee
Issue Date:April 2009
pp. 84-89
The recent demand in wireless standards capable of providing short-range, high-speed data transfer has accelerated the growth of the Ultra-Wide Band (UWB) standard. MB-OFDM (Multi Band Orthogonal Frequency Division Multiplexing) UWB devices suffer from fre...
 
Guided Probabilistic Checksums for Error Control in Low Power Digital-Filters
Found in: On-Line Testing Symposium, IEEE International
By Muhammad Mudassar Nisar, Abhijit Chatterjee
Issue Date:July 2008
pp. 239-244
In many DSP applications (image and voice processing, baseband symbol decoding in high quality communication channels) several dBs of SNR loss can be tolerated without noticeable impact on system level performance. For power optimization in such applicatio...
 
Fast Accurate Tests for Multi-Carrier Transceiver Specifications: EVM and Noise
Found in: VLSI Test Symposium, IEEE
By Rajarajan Senguttuvan, Soumendu Bhattacharya, Abhijit Chatterjee
Issue Date:May 2008
pp. 175-180
Production testing of digitally modulated transceivers such as those based on orthogonal frequency division multiplexing (OFDM) has become challenging, particularly in the context of measuring specifications such as error-vector-magnitude (EVM) which requi...
 
Test Enabled Process Tuning for Adaptive Baseband OFDM Processor
Found in: VLSI Test Symposium, IEEE
By Muhammad Mudassar Nisar, Abhijit Chatterjee
Issue Date:May 2008
pp. 9-16
As channel conditions in wireless communications improve, the noise performance of the baseband DSP processor can be degraded to save power without compromising bit error rate. The degradation of baseband signal noise is achieved by degrading the noise per...
 
Loopback DFT for Low-Cost Test of Single-VCO-Based Wireless Transceivers
Found in: IEEE Design and Test of Computers
By Ganesh Srinivasan, Friedrich Taenzler, Abhijit Chatterjee
Issue Date:March 2008
pp. 150-159
Recent advances in design and process technologies of wireless transceivers have enabled RF IC manufactures to reduce die costs thorough higher levels of integration. This often causes an opposite reaction from the packaging and test costs because of the i...
 
Digital bit stream jitter testing using jitter expansion
Found in: Design, Automation and Test in Europe Conference and Exhibition
By Hyun Choi, Abhijit Chatterjee
Issue Date:March 2008
pp. 1468-1473
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurements of sinusoidal signals before, its applicability to random clock jitter test...
 
Concurrent Multi-Dimensional Adaptation for Low-Power Operation in Wireless Devices
Found in: VLSI Design, International Conference on
By Rajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee
Issue Date:January 2008
pp. 65-70
In this paper, we develop a multi dimensional adaptive power management approach for wireless systems that optimally trades off power vs. performance across temporally changing operating conditions by concurrently tuning control parameters in the RF and di...
 
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