A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays
Found in: IEEE Transactions on Computers
By Z. Arevalo, J.G. Bredeson
Issue Date:November 1978
pp. 1028-1039
This paper describes an algorithm for minimizing an arbitrary Boolean function. The approach differs from most previous procedures in which first all prime implicants are found and then a minimal set is then determined. This procedure imposes a set of cond...

Comments on
Found in: IEEE Transactions on Computers
By C.D. Latino, J.G. Bredeson
Issue Date:December 1974
pp. 1326
Bosson and Hong1 have developed an effective procedure for multiple fault detection. However, their claim that their procedure gives near-minimal results is not necessarily the case.

Synthesis of Multiple-Input Change Asynchronous Circuits Using Transition-Sensitive Flip-Flops
Found in: IEEE Transactions on Computers
By J.G. Bredeson, P.T. Hulina
Issue Date:May 1973
pp. 524-531
Recently, a good deal of research has been conducted on the use of transition-or edge-sensitive elements in the design of asynchronous sequential circuits. Transition-sensitive memory elements have been used extensively in the implementation of synchronous...

Generation of a Clock Pulse for Asynchronous Sequential Machines to Eliminate Critical Races
Found in: IEEE Transactions on Computers
By J.G. Bredeson, P.T. Hulina
Issue Date:February 1971
pp. 225-226
A circuit for generating a clock pulse for asynchronous circuits is given, and when used with transition sensitive flip-flops eliminates critical races for an arbitrary state assignment. Thus the minimum number of internal variables may be used. Furthermor...

On Tracey's Internal State Assignment Method
Found in: IEEE Transactions on Computers
By P.T. Hulina, J.G. Bredeson
Issue Date:May 1970
pp. 458
Certain partitions in Tracey's assignment method may be eliminated because of impossible transitions on the inputs. This may reduce the complexity of the sequential machine.