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Issue No.02 - March-April (2007 vol.24)
pp: 140-152
Nicola Bombieri , University of Verona
Franco Fummi , University of Verona
Graziano Pravadelli , University of Verona
Andrea Fedeli , STMicroelectronics
ABSTRACT
Transaction-level modeling (TLM) has been proposed as the leading strategy to address the ever-increasing complexity of digital systems. However, its introduction brings a new challenge for designers and verification engineers. Because no tools are available to automatically derive an RTL implementation from a transaction-level (TL) design, manual refinements are necessary. This article presents a hybrid, incremental assertion-based verification (ABV) methodology to check the correctness of the TL-to-RTL refinement. The methodology relies on reusing assertions and already-checked code and is guided by assertion coverage metrics.
INDEX TERMS
hybrid, assertion-based verification, TLM, design flow, RTL
CITATION
Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Andrea Fedeli, "Hybrid, Incremental Assertion-Based Verification for TLM Design Flows", IEEE Design & Test of Computers, vol.24, no. 2, pp. 140-152, March-April 2007, doi:10.1109/MDT.2007.48
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