10th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems Design Exploration in Hw/Sw Co-design of Real-Time Object-oriented Embedded Systems: the Scheduler Object Sedona, Arizona February 02-February 04 ISBN: 0-7695-2347-1
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/WORDS.2005.25
This paper discusses a design flow for multithread object-oriented real-time applications, running on top of an embedded, platform-based, customizable Java processor, which is prototyped using affordable FPGAs. The proposed approach enforces design space exploration activities, taking into account aspects like temporal behavior, memory footprint, and power/energy consumption. A case study containing a task scheduler implementation as both software and hardware modules is presented. While both implementations are compatible with the developed program from an interface point of view, they lead to different timing and footprint requirements. Their evaluation in terms of memory occupation and number of FPGA logic cells is presented.
Citation:
Elias Teodoro Jr Silva, Marco A. Wehrmeister, Leandro Buss Becker, Fl?vio Rech Wagner, Carlos Eduardo Pereira, "Design Exploration in Hw/Sw Co-design of Real-Time Object-oriented Embedded Systems: the Scheduler Object," words, pp.378-388, 10th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||