loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Second Working Conference on Asynchronous Design Methodologies
A hybrid asynchronous system design environment
London, England
May 30-May 31
ISBN: 0-8186-7098-3
ASCII Text
x 
 
C. Farnsworth, D.A. Edwards, Jianwei Liu, S.S. Sikand, "A hybrid asynchronous system design environment," Asynchronous Circuits and Systems, International Symposium on, pp. 91, Second Working Conference on Asynchronous Design Methodologies, 1995.
 
 
BibTex
x
 
@article{ 10.1109/WCADM.1995.514646,
author = {C. Farnsworth and D.A. Edwards and Jianwei Liu and S.S. Sikand},
title = {A hybrid asynchronous system design environment},
journal ={Asynchronous Circuits and Systems, International Symposium on},
volume = {0},
year = {1995},
isbn = {0-8186-7098-3},
pages = {91},
doi = {http://doi.ieeecomputersociety.org/10.1109/WCADM.1995.514646},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asynchronous Circuits and Systems, International Symposium on
TI - A hybrid asynchronous system design environment
SN - 0-8186-7098-3
SP
EP
A1 - C. Farnsworth,
A1 - D.A. Edwards,
A1 - Jianwei Liu,
A1 - S.S. Sikand,
PY - 1995
KW - high level synthesis; asynchronous circuits; hybrid asynchronous system design environment; hybrid design scheme; asynchronous circuit synthesis; Tangram silicon complier; micropipelines; synchronous design techniques; concurrency; power reduction; performance gains
VL - 0
JA - Asynchronous Circuits and Systems, International Symposium on
ER -
 
C. Farnsworth, Dept. of Comput. Sci., Manchester Univ., UK
D.A. Edwards, Dept. of Comput. Sci., Manchester Univ., UK
Jianwei Liu, Dept. of Comput. Sci., Manchester Univ., UK
S.S. Sikand, Dept. of Comput. Sci., Manchester Univ., UK
A hybrid design scheme for the synthesis of asynchronous circuits is described which exploits the rapid design time achievable using the Tangram silicon complier (developed by Philips), the high performance of 4-phase micropipelines and the use of synchronous design techniques to increase concurrency and therefore performance. Trade-offs between area, power performance and design time are thus supported. Substantial performance gains and power reduction may be achieved.
Index Terms:
high level synthesis; asynchronous circuits; hybrid asynchronous system design environment; hybrid design scheme; asynchronous circuit synthesis; Tangram silicon complier; micropipelines; synchronous design techniques; concurrency; power reduction; performance gains
Citation:
C. Farnsworth, D.A. Edwards, Jianwei Liu, S.S. Sikand, "A hybrid asynchronous system design environment," async, pp.91, Second Working Conference on Asynchronous Design Methodologies, 1995
Usage of this product signifies your acceptance of the Terms of Use.