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26th IEEE VLSI Test Symposium (vts 2008)
Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture
April 27-May 01
ISBN: 0-7695-3123-7
Trace buffers are commonly used to capture data during in-system silicon debug. This paper exploits the fact that it is not necessary to capture error-free data in the trace buffer since that information is obtainable from simulation. The trace buffer need only capture data during clock cycles in which errors are present. A three pass methodology is proposed. During the first pass, the rough error rate is measured, in the second pass, a set of suspect clock cycles where errors may be present is determined, and then in the third pass, the trace buffer captures only during the suspect clock cycles. In this manner, the effective observation window of the trace buffer can be expanded significantly, by up to orders of magnitude. This greatly increases the effectiveness of a given size trace buffer and can rapidly speed up the debug process. The suspect clock cycles are determined through a two dimensional (2-D) compaction technique using a combination of multiple-input signature register (MISR) signatures and cycling register signatures. By intersecting the signatures, the proposed 2-D compaction technique generates a small set of remaining suspect clock cycles for which the trace buffer needs to capture data. Experimental results indicate very significant increases in the effective observation window for a trace buffer can be obtained.
Index Terms:
Silicon Debug, Trace Buffer Observation Window, Two-Dimensional (2-D) Compaction, MISR, Cycling Register
Citation:
Joon-Sung Yang, Nur A. Touba, "Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture," vts, pp.345-351, 26th IEEE VLSI Test Symposium (vts 2008), 2008
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