loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
26th IEEE VLSI Test Symposium (vts 2008)
Constructing Augmented Multimode Compactors
April 27-May 01
ISBN: 0-7695-3123-7
In this paper, a new space compactor, called an augmented multimode compactor, is presented. Accordingly, scan chains are separated into groups using t orthogonal partitions. The augmented multimode compactor has three modes such that all scan chains, a group of scan chains and an intersection of two groups of scan chains is selected for compression. Respectively, 1, kt-1 and any number of unknown states per shift-out cycle can be tolerated in these modes where k is the number of the compactor outputs assigned for observation of each scan chain. Simulation results demonstrate the efficiency of the proposed principles for constructing fully X-tolerant compactors. In the range of 0 to 10 percent of unknown states in test responses, the proposed scheme achieved the same or up to 3 times better observability than the fully X-tolerant combinational compactor.
Index Terms:
test data compression, on-chip compression, array codes, linear codes
Citation:
Emil Gizdarski, "Constructing Augmented Multimode Compactors," vts, pp.29-34, 26th IEEE VLSI Test Symposium (vts 2008), 2008
Usage of this product signifies your acceptance of the Terms of Use.