Scan Tests with Multiple Fault Activation Cycles for Delay Faults

V
VTS
2006
24th IEEE VLSI Test Symposium
Abstract - Scan Tests with Multiple Fault Activation Cycles for Delay Faults

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24th IEEE VLSI Test Symposium

Berkeley, California

April 30-May 04

ISBN: 0-7695-2514-8

	ASCII Text	x
	Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz, Xijiang Lin, Janusz Rajski, "Scan Tests with Multiple Fault Activation Cycles for Delay Faults," VLSI Test Symposium, IEEE, pp. 343-348, 24th IEEE VLSI Test Symposium, 2006.

	BibTex	x
	@article{ 10.1109/VTS.2006.91, author = {Zhuo Zhang and Sudhakar M. Reddy and Irith Pomeranz and Xijiang Lin and Janusz Rajski}, title = {Scan Tests with Multiple Fault Activation Cycles for Delay Faults}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2006}, isbn = {0-7695-2514-8}, pages = {343-348}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2006.91}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Scan Tests with Multiple Fault Activation Cycles for Delay Faults SN - 0-7695-2514-8 SP343 EP348 A1 - Zhuo Zhang, A1 - Sudhakar M. Reddy, A1 - Irith Pomeranz, A1 - Xijiang Lin, A1 - Janusz Rajski, PY - 2006 KW - null VL - 0 JA - VLSI Test Symposium, IEEE ER -

Zhuo Zhang, University of Iowa

Sudhakar M. Reddy, University of Iowa

Irith Pomeranz, Purdue University

Xijiang Lin, Mentor Graphics Corp.

Janusz Rajski, Mentor Graphics Corp.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2006.91

In this paper we investigate methods to detect delay faults in circuits that use standard scan design. We demonstrate that delay faults at several sites in a circuit cannot be detected using standard launch off capture and launch off shift tests that use two test cycles. However, faults at these sites are detectable using tests that use more than two test cycles. Experimental results on benchmark and industrial circuits that use standard scan design show that substantial numbers of transition delay faults require tests using more than one fault activation cycles to detect them.

Citation:

Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz, Xijiang Lin, Janusz Rajski, "Scan Tests with Multiple Fault Activation Cycles for Delay Faults," vts, pp.343-348, 24th IEEE VLSI Test Symposium, 2006

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