Session Abstract

V
VTS
2006
24th IEEE VLSI Test Symposium
Abstract - Session Abstract

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24th IEEE VLSI Test Symposium

Session Abstract (PDF)

Berkeley, California

April 30-May 04

ISBN: 0-7695-2514-8

	ASCII Text	x
	Bernard Courtois, "Session Abstract," VLSI Test Symposium, IEEE, pp. 150-151, 24th IEEE VLSI Test Symposium, 2006.

	BibTex	x
	@article{ 10.1109/VTS.2006.76, author = {Bernard Courtois}, title = {Session Abstract}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2006}, isbn = {0-7695-2514-8}, pages = {150-151}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2006.76}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Session Abstract SN - 0-7695-2514-8 SP150 EP151 A1 - Bernard Courtois, PY - 2006 KW - null VL - 0 JA - VLSI Test Symposium, IEEE ER -

Bernard Courtois, TIMA-France

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2006.76

According to the Moore?s Law, the number of transistors per integrated circuit doubles every 24 months, and it has been the guiding principle for the silicon semiconductor industry for over 30 years. The sustaining of the Moore?s Law, however, requires continued transistor scaling and performance improvement.

Citation:

Bernard Courtois, "Session Abstract," vts, pp.150-151, 24th IEEE VLSI Test Symposium, 2006

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