Design technologies for silicon-based integrated systems present unprecedented advantages and challenges, the former being related to the very high device density and the latter the increased presence of defects. In 45nm CMOS, in a single system on chip (SoC) over a thousand microprocessor cores, or modules of comparable complexity, may be integrated. On the other hand using System-in-Package (SiP) technology separate chips can be packaged together into a system with a very small form factor using a common 2D or 3D substrate. It is most suitable for the integration of heterogeneous technologies where single-chip integration is difficult or too expensive to pursue.