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24th IEEE VLSI Test Symposium
Multi-Cycle Sensitizable Transition Delay Faults
Berkeley, California
April 30-May 04
ISBN: 0-7695-2514-8
Jais Abraham, Texas Instruments, India
Uday Goel, Indian Institute of Technology, India
Arun Kumar, Texas Instruments, India
Transition fault testing has been traditionally performed on full scan sequential circuits using a two vector test; the first vector is used to initialize a node while the second vector is used to sensitize the fault on the node and to propagate the fault effects to an observation point. Although a two pattern test is good for detecting most of the delay faults that can cause circuits to malfunction, there are certain delay defects that cannot be detected using this test generation approach. In this paper, we review this class of delay faults which require three or more vectors for their detection. We show how launch-off-shift (LOS) transition fault patterns can be used effectively to detect some of these faults thus improving the quality of the delay fault tests. We also explore methods to minimize the yield loss incurred on account of using LOS patterns.
Citation:
Jais Abraham, Uday Goel, Arun Kumar, "Multi-Cycle Sensitizable Transition Delay Faults," vts, pp.306-313, 24th IEEE VLSI Test Symposium, 2006
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