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24th IEEE VLSI Test Symposium
Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories
Berkeley, California
April 30-May 04
ISBN: 0-7695-2514-8
G. Harutunyan, Virage Logic, Armenia
V.A. Vardanian, Virage Logic, Armenia
Y. Zorian Zorian, Virage Logic, Armenia
In this paper, a new notion of 2-composite static faults covering all unlinked and (realistic) linked static faults is introduced. We have introduced 120 new linked fault primitives missing in the paper by Hamdioui et al (IEEE TCAD 2004), thus extending the universe of linked fault primitives known before by 25%. A March test algorithm of length 23N (N - number of memory words) for detection of linked static faults in Random Access Memories is proposed. It reduces the length of a previously known algorithm (Hamdioui et al, IEEE TCAD 2004) by 18N. We proved the proposed test is of minimum length
Citation:
G. Harutunyan, V.A. Vardanian, Y. Zorian Zorian, "Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories," vts, pp.120-127, 24th IEEE VLSI Test Symposium, 2006
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