24th IEEE VLSI Test Symposium A SNDR BIST for \Sigma\Delta Analogue-to-Digital Converters Berkeley, California April 30-May 04 ISBN: 0-7695-2514-8
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2006.12
The test of high resolution Sigma-Delta Analogueto- Digital Converters (\Sigma\Delta ADCs) is a costly task due to its high resolution and the large number of samples required. In this paper, we propose a Built-In Self-Test (BIST) technique for the test of SNDR (Signal-to-Noise plus Distortion Ratio) in \Sigma\Delta ADCs. The technique, mostly digital, uses a binary stream as test stimulus and carries out a sine-wave fitting algorithm to analyse the output response. Both the test signal generation and the output response analysis are performed on-chip, taking advantage of the digital resources already present in a \Sigma\Delta ADC. Simulations results show the capability of this technique to obtain measures of the SNDR for a 16-bit audio \Sigma\Delta ADC.
Citation:
Luis Rol?ndez, Salvador Mir, Ahc?ne Bounceur, Jean-Louis Carbon?ro, "A SNDR BIST for \Sigma\Delta Analogue-to-Digital Converters," vts, pp.314-319, 24th IEEE VLSI Test Symposium, 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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