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23rd IEEE VLSI Test Symposium (VTS'05)
Synthesis of X-Tolerant Convolutional Compactors
Palm Springs, California
May 01-May 05
ISBN: 0-7695-2314-5
ASCII Text
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Janusz Rajski, Jerzy Tyszer, "Synthesis of X-Tolerant Convolutional Compactors," VLSI Test Symposium, IEEE, pp. 114-119, 23rd IEEE VLSI Test Symposium (VTS'05), 2005.
 
 
BibTex
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@article{ 10.1109/VTS.2005.81,
author = {Janusz Rajski and Jerzy Tyszer},
title = {Synthesis of X-Tolerant Convolutional Compactors},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {2005},
issn = {1093-0167},
pages = {114-119},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2005.81},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Synthesis of X-Tolerant Convolutional Compactors
SN - 1093-0167
SP114
EP119
A1 - Janusz Rajski,
A1 - Jerzy Tyszer,
PY - 2005
KW - null
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
Janusz Rajski, Mentor Graphics Corporation
Jerzy Tyszer, Poznan University of Technology
The paper presents a very efficient method for synthesis of convolutional compactors capable of tolerating a number of unknown states in a single time frame while providing very high compaction ratios.
Citation:
Janusz Rajski, Jerzy Tyszer, "Synthesis of X-Tolerant Convolutional Compactors," vts, pp.114-119, 23rd IEEE VLSI Test Symposium (VTS'05), 2005
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