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23rd IEEE VLSI Test Symposium (VTS'05)
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers
Palm Springs, California
May 01-May 05
ISBN: 0-7695-2314-5
Alberto Valdes-Garcia, Texas A&M University
Radhika Venkatasubramanian, Texas A&M University
Rangakrishnan Srinivasan, Texas A&M University
Jose Silva-Martinez, Texas A&M University
Edgar S?nchez-Sinencio, Texas A&M University
A CMOS RF RMS detector is introduced. It generates a DC proportional to the RMS voltage amplitude of an RF signal. Its high input impedance and small silicon area make it suitable for the built-in testing (BIT) of critical RF blocks of a transceiver such as a Low Noise Amplifier (LNA) and Power Amplifier (PA) without affecting their performance and with minimum area overhead. The use of this structure in the fault detection and diagnosis of a wireless transceiver is described and illustrated with an example. The transistor-level implementation of the proposed circuit is discussed in detail. Post-layout simulation results using CMOS 0.35 μm technology show that this testing device is able to perform an RF to DC conversion at 2.4GHz in a dynamic range of 20dB using an area of only 0.0135mm^2 and presenting an equivalent input capacitance of 22.5fF.
Citation:
Alberto Valdes-Garcia, Radhika Venkatasubramanian, Rangakrishnan Srinivasan, Jose Silva-Martinez, Edgar S?nchez-Sinencio, "A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers," vts, pp.249-254, 23rd IEEE VLSI Test Symposium (VTS'05), 2005
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