23rd IEEE VLSI Test Symposium (VTS'05) Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST Palm Springs, California May 01-May 05 ISBN: 0-7695-2314-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2005.48
Scan-based tests created by automatic test pattern generators (ATPG) can be efficiently compressed and applied in a deterministic built-in self-test (DBIST) architecture. However, the BIST environment adds significant complexity to failure diagnosis. We present a simple scan-compatible diagnosis solution — streaming DBIST (SDBIST), which is based on a low-overhead hierarchical compactor. SDBIST allows continuously monitoring streaming scanout data for reduced-volume expect-data diagnosis, on-line fail-data collection and selective scan cell masking.
Citation:
Peter Wohl, John A. Waicukauski, Sanjay Patel, Cy Hay, Emil Gizdarski, Ben Mathew, "Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST," vts, pp.359-365, 23rd IEEE VLSI Test Symposium (VTS'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||