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23rd IEEE VLSI Test Symposium (VTS'05)
Flash Memory Built-In Self-Diagnosis with Test Mode Control
Palm Springs, California
May 01-May 05
ISBN: 0-7695-2314-5
Jen-Chieh Yeh, National Tsing Hua University
Yan-Ting Lai, National Tsing Hua University
Yuan-Yuan Shih, National Tsing Hua University
Cheng-Wen Wu, National Tsing Hua University
Chien-Hung Ho, eMemory Technology Inc.
Yen-Tai Lin, eMemory Technology Inc.
The objective of this paper is to present a cost-effective fault diagnosis methodology for flash memory. Flash memory is enjoying a rapid market growth. The research for flash memory testing is mainly to reduce the test cost and improve the production yield. In this paper, we propose a fault diagnosis flow for flash memory. We also propose a flexible built-in self-diagnosis (BISD) design with enhanced test mode control, which reduces the test time and diagnostic data shift-out cycles by using parallel programming and erasure and employing a parallel shift-out mechanism. The area overhead of our BISD circuit is only about 0.5% for a 256Mb commodity flash memory chip. Experimental results from industrial chips show that the proposed diagnosis methodology has high accuracy in distinguishing the fault type.
Citation:
Jen-Chieh Yeh, Yan-Ting Lai, Yuan-Yuan Shih, Cheng-Wen Wu, Chien-Hung Ho, Yen-Tai Lin, "Flash Memory Built-In Self-Diagnosis with Test Mode Control," vts, pp.15-20, 23rd IEEE VLSI Test Symposium (VTS'05), 2005
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