23rd IEEE VLSI Test Symposium (VTS'05) Built-In Test of RF Components Using Mapped Feature Extraction Sensors Palm Springs, California May 01-May 05 ISBN: 0-7695-2314-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2005.33
At low frequencies, alternate testing is based on sampling the test response using an A/D converter and analyzing the digitized response in the external tester. In order to use alternate test at frequencies in the multi-GHz range, where the above is not possible, the test waveforms need to be very simple and the evaluation of the test response needs to be handled by on-chip analog test response "feature extractors". In this work, specialized functions of the output response from an alternate test are computed using built-in feature extraction sensors, which measure a complex function of the response waveform and output a DC signature. Different sensor structures are evaluated based on their performance in the presence of environmental effects and process shifts It is seen that very simple sensing circuitry can predict high quality alternate test for RF components..
Citation:
S. Sermet Akbay, Abhijit Chatterjee, "Built-In Test of RF Components Using Mapped Feature Extraction Sensors," vts, pp.243-248, 23rd IEEE VLSI Test Symposium (VTS'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||