Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments

V
VTS
2001
19th IEEE VLSI Test Symposium
Abstract - Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments

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19th IEEE VLSI Test Symposium

Marina Del Rey, CA

March 29-April 03

ISBN: 0-7695-1122-8

	ASCII Text	x
	I. de Paúl, M. Rosales, B. Alorda, J. Segura, C. Hawkins, J. Soden, "Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments," VLSI Test Symposium, IEEE, pp. 0286, 19th IEEE VLSI Test Symposium, 2001.

	BibTex	x
	@article{ 10.1109/VTS.2001.923451, author = {I. de Paúl and M. Rosales and B. Alorda and J. Segura and C. Hawkins and J. Soden}, title = {Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2001}, isbn = {0-7695-1122-8}, pages = {0286}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923451}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments SN - 0-7695-1122-8 SP EP A1 - I. de Paúl, A1 - M. Rosales, A1 - B. Alorda, A1 - J. Segura, A1 - C. Hawkins, A1 - J. Soden, PY - 2001 VL - 0 JA - VLSI Test Symposium, IEEE ER -

I. de Paúl, University Illes Balears

M. Rosales, University Illes Balears

B. Alorda, University Illes Balears

J. Segura, University Illes Balears

C. Hawkins, The University of New Mexico

J. Soden, Sandia National Labs

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923451

We evaluated a diagnostic technique based on the charge delivered to the IC during a transition. Charge computed from the transient supply current is related to the circuit internal activity. A specific activity can be forced into the circuit using appropriate test vectors to highlight possible defect locations. Experimental results from a small test circuit and a 256K SRAM demonstrate the experimental viability of the technique. The theoretical foundation is also discussed.

Citation:

I. de Paúl, M. Rosales, B. Alorda, J. Segura, C. Hawkins, J. Soden, "Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments," vts, pp.0286, 19th IEEE VLSI Test Symposium, 2001

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