19th IEEE VLSI Test Symposium A Low-Cost Adaptive Ramp Generator for Analog BIST Applications Marina Del Rey, CA March 29-April 03 ISBN: 0-7695-1122-8
This paper presents a high-quality and area-efficient ramp generator to be used for on-chip testing of analog and mixed-signal circuits. An original adaptive scheme is developed to palliate the inaccuracy of a basic ramp generator. As a result, the proposed adaptive ramp generator exhibits very good performances in terms of slope precision and ramp linearity while maintaining a low area overhead.
Citation:
F. Azaïs, S. Bernard, Y. Bertrand, X. Michel, M. Renovell, "A Low-Cost Adaptive Ramp Generator for Analog BIST Applications," vts, pp.0266, 19th IEEE VLSI Test Symposium, 2001 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||