19th IEEE VLSI Test Symposium Efficient Transparency Extraction and Utilization in Hierarchical Test Marina Del Rey, CA March 29-April 03 ISBN: 0-7695-1122-8
We introduce a methodology for identifying transparency behavior appropriate for hierarchical test, based on the theoretical principles of transparency composition. Unlike high level approaches that identify limited, coarse transparency behavior, the proposed methodology is capable of extracting a wide class of fine grained transparency functions for arbitrary sub-word bit clusters. The functions in this class can furthermore be rapidly extracted on the fly and efficiently utilized for hierarchical test translation, thus alleviating the exponential extraction time and storage space requirements of exhaustive approaches. The twin benefits of rapid, automated extraction coupled with the expansion of utilizable transparency scope deliver reduced DFT while enabling cost-effective hierarchical test of high quality.
Citation:
Yiorgos Makris, Vishal Patel, Alex Orailoglu, "Efficient Transparency Extraction and Utilization in Hierarchical Test," vts, pp.0246, 19th IEEE VLSI Test Symposium, 2001 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||