A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals

V
VTS
2001
19th IEEE VLSI Test Symposium
Abstract - A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals

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19th IEEE VLSI Test Symposium

Marina Del Rey, CA

March 29-April 03

ISBN: 0-7695-1122-8

	ASCII Text	x
	Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen, "A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals," VLSI Test Symposium, IEEE, pp. 0102, 19th IEEE VLSI Test Symposium, 2001.

	BibTex	x
	@article{ 10.1109/VTS.2001.923425, author = {Takahiro J. Yamaguchi and Masahiro Ishida and Mani Soma and David Halter and Rajesh Raina and Jim Nissen}, title = {A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2001}, isbn = {0-7695-1122-8}, pages = {0102}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923425}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals SN - 0-7695-1122-8 SP EP A1 - Takahiro J. Yamaguchi, A1 - Masahiro Ishida, A1 - Mani Soma, A1 - David Halter, A1 - Rajesh Raina, A1 - Jim Nissen, PY - 2001 VL - 0 JA - VLSI Test Symposium, IEEE ER -

Takahiro J. Yamaguchi, Advantest Laboratories, Ltd

Masahiro Ishida, Advantest Laboratories, Ltd

Mani Soma, University of Washington

David Halter, Motorola Inc.

Rajesh Raina, Motorola Inc.

Jim Nissen, Motorola Inc.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923425

This paper introduces the extended ΔΦmethod for measuring cycle-to-cycle period jitter in PLL outputs. The theoretical basis for this method is derived from the limited condition for the average period and analytic signal theory. Sinusoidal jitter measurements verify the relationship between cycle-to-cycle period jitter and timing jitter. To validate the method, experimental data from jitter measurements on a PowerPCTM microprocessor is analyzed in the frequency domain. Comparisons of phase quantization errors are made between the extended ΔΦmethod and the conventional zero-crossing method.

Citation:

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen, "A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals," vts, pp.0102, 19th IEEE VLSI Test Symposium, 2001

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