22nd IEEE VLSI Test Symposium On Comparison of NCR Effectiveness with a Reduced I{DDQ} Vector Set Napa Valley, California April 25-April 29 ISBN: 0-7695-2134-7
I{DDQ} test-based outlier rejection becomes difficult for deep sub-micron technology chips due to increased leakage and process variations. The use of Neighbor Current Ratio (NCR) that uses wafer-level spatial correlation for identifying outlier chips has been proposed earlier as a means of coping with these issues. Due to the slow speed of I{DDQ} test, there is a strong motivation to reduce the number of test vectors without compromising the fault coverage. In this paper, we examine the effectiveness of Neighbor Current Ratio using a reduced I{DDQ} vector set and industrial test data.
Citation:
Sagar Sabade, D. M. H. Walker, "On Comparison of NCR Effectiveness with a Reduced I{DDQ} Vector Set," vts, pp.65, 22nd IEEE VLSI Test Symposium, 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||