Delay Defect Screening using Process Monitor Structures

V
VTS
2004
22nd IEEE VLSI Test Symposium
Abstract - Delay Defect Screening using Process Monitor Structures

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22nd IEEE VLSI Test Symposium

Napa Valley, California

April 25-April 29

ISBN: 0-7695-2134-7

	ASCII Text	x
	Subhasish Mitra, Erik Volkerink, Edward J. McCluskey, Stefan Eichenberger, "Delay Defect Screening using Process Monitor Structures," VLSI Test Symposium, IEEE, pp. 43, 22nd IEEE VLSI Test Symposium, 2004.

	BibTex	x
	@article{ 10.1109/VTEST.2004.1299224, author = {Subhasish Mitra and Erik Volkerink and Edward J. McCluskey and Stefan Eichenberger}, title = {Delay Defect Screening using Process Monitor Structures}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2004}, issn = {1093-0167}, pages = {43}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.2004.1299224}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Delay Defect Screening using Process Monitor Structures SN - 1093-0167 SP EP A1 - Subhasish Mitra, A1 - Erik Volkerink, A1 - Edward J. McCluskey, A1 - Stefan Eichenberger, PY - 2004 KW - null VL - 0 JA - VLSI Test Symposium, IEEE ER -

Subhasish Mitra, Intel Corporating, Sacramento, CA; Stanford University, CA

Erik Volkerink, Stanford University, CA

Edward J. McCluskey, Stanford University, CA

Stefan Eichenberger, Philips Semiconductors, Nijmegen, The Netherlands

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.2004.1299224

This paper presents delay test data collected from test chips fabricated in a 0.18μ technology. The experimental data shows that process monitor structures such as on-chip ring oscillators are effective in identifying slow parts while performing transition fault testing at frequencies slower than the rated frequency.

Citation:

Subhasish Mitra, Erik Volkerink, Edward J. McCluskey, Stefan Eichenberger, "Delay Defect Screening using Process Monitor Structures," vts, pp.43, 22nd IEEE VLSI Test Symposium, 2004

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